# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s

---
name:            unmerge_dup8
legalized:       true
body:             |
  bb.1.entry:
    ; CHECK-LABEL: name: unmerge_dup8
    ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[DUPLANE8_:%[0-9]+]]:_(<8 x s8>) = G_DUPLANE8 [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $d0 = COPY [[DUPLANE8_]](<8 x s8>)
    ; CHECK-NEXT: $d1 = COPY [[DUPLANE8_]](<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(<16 x s8>) = COPY $q0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<16 x s8>) = G_DUPLANE8 %0, %1
    %3:_(<8 x s8>), %4:_(<8 x s8>) = G_UNMERGE_VALUES %2
    $d0 = COPY %3
    $d1 = COPY %4
    RET_ReallyLR implicit $x0

...
---
name:            unmerge_dup16
legalized:       true
body:             |
  bb.1.entry:
    ; CHECK-LABEL: name: unmerge_dup16
    ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[DUPLANE16_:%[0-9]+]]:_(<4 x s16>) = G_DUPLANE16 [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $d0 = COPY [[DUPLANE16_]](<4 x s16>)
    ; CHECK-NEXT: $d1 = COPY [[DUPLANE16_]](<4 x s16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(<8 x s16>) = COPY $q0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<8 x s16>) = G_DUPLANE16 %0, %1
    %3:_(<4 x s16>), %4:_(<4 x s16>) = G_UNMERGE_VALUES %2
    $d0 = COPY %3
    $d1 = COPY %4
    RET_ReallyLR implicit $x0

...
---
name:            unmerge_dup32
legalized:       true
body:             |
  bb.1.entry:
    ; CHECK-LABEL: name: unmerge_dup32
    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[DUPLANE32_:%[0-9]+]]:_(<2 x s32>) = G_DUPLANE32 [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $d0 = COPY [[DUPLANE32_]](<2 x s32>)
    ; CHECK-NEXT: $d1 = COPY [[DUPLANE32_]](<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(<4 x s32>) = COPY $q0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<4 x s32>) = G_DUPLANE32 %0, %1
    %3:_(<2 x s32>), %4:_(<2 x s32>) = G_UNMERGE_VALUES %2
    $d0 = COPY %3
    $d1 = COPY %4
    RET_ReallyLR implicit $x0

...
---
name:            unmerge_dup64
legalized:       true
body:             |
  bb.1.entry:
    ; CHECK-LABEL: name: unmerge_dup64
    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[DUPLANE64_:%[0-9]+]]:_(<2 x s64>) = G_DUPLANE64 [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DUPLANE64_]](<2 x s64>), [[C1]](s64)
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DUPLANE64_]](<2 x s64>), [[C2]](s64)
    ; CHECK-NEXT: $d0 = COPY [[EVEC]](s64)
    ; CHECK-NEXT: $d1 = COPY [[EVEC1]](s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(<2 x s64>) = COPY $q0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<2 x s64>) = G_DUPLANE64 %0, %1
    %3:_(s64), %4:_(s64) = G_UNMERGE_VALUES %2
    $d0 = COPY %3
    $d1 = COPY %4
    RET_ReallyLR implicit $x0

...