; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD
; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI

define i64 @fptos_f64_i64(double %a) {
; CHECK-LABEL: fptos_f64_i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs x0, d0
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i64
  ret i64 %c
}

define i64 @fptou_f64_i64(double %a) {
; CHECK-LABEL: fptou_f64_i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu x0, d0
; CHECK-NEXT:    ret
entry:
  %c = fptoui double %a to i64
  ret i64 %c
}

define i32 @fptos_f64_i32(double %a) {
; CHECK-LABEL: fptos_f64_i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w0, d0
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i32
  ret i32 %c
}

define i32 @fptou_f64_i32(double %a) {
; CHECK-LABEL: fptou_f64_i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu w0, d0
; CHECK-NEXT:    ret
entry:
  %c = fptoui double %a to i32
  ret i32 %c
}

define i16 @fptos_f64_i16(double %a) {
; CHECK-LABEL: fptos_f64_i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w0, d0
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i16
  ret i16 %c
}

define i16 @fptou_f64_i16(double %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f64_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs w0, d0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f64_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w0, d0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f64_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w0, d0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f64_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w0, d0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui double %a to i16
  ret i16 %c
}

define i8 @fptos_f64_i8(double %a) {
; CHECK-LABEL: fptos_f64_i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w0, d0
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i8
  ret i8 %c
}

define i8 @fptou_f64_i8(double %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f64_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs w0, d0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f64_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w0, d0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f64_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w0, d0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f64_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w0, d0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui double %a to i8
  ret i8 %c
}

define i128 @fptos_f64_i128(double %a) {
; CHECK-LABEL: fptos_f64_i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixdfti
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i128
  ret i128 %c
}

define i128 @fptou_f64_i128(double %a) {
; CHECK-LABEL: fptou_f64_i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixunsdfti
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptoui double %a to i128
  ret i128 %c
}

define i64 @fptos_f32_i64(float %a) {
; CHECK-LABEL: fptos_f32_i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs x0, s0
; CHECK-NEXT:    ret
entry:
  %c = fptosi float %a to i64
  ret i64 %c
}

define i64 @fptou_f32_i64(float %a) {
; CHECK-LABEL: fptou_f32_i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu x0, s0
; CHECK-NEXT:    ret
entry:
  %c = fptoui float %a to i64
  ret i64 %c
}

define i32 @fptos_f32_i32(float %a) {
; CHECK-LABEL: fptos_f32_i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w0, s0
; CHECK-NEXT:    ret
entry:
  %c = fptosi float %a to i32
  ret i32 %c
}

define i32 @fptou_f32_i32(float %a) {
; CHECK-LABEL: fptou_f32_i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu w0, s0
; CHECK-NEXT:    ret
entry:
  %c = fptoui float %a to i32
  ret i32 %c
}

define i16 @fptos_f32_i16(float %a) {
; CHECK-LABEL: fptos_f32_i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w0, s0
; CHECK-NEXT:    ret
entry:
  %c = fptosi float %a to i16
  ret i16 %c
}

define i16 @fptou_f32_i16(float %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f32_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f32_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w0, s0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f32_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w0, s0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f32_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w0, s0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui float %a to i16
  ret i16 %c
}

define i8 @fptos_f32_i8(float %a) {
; CHECK-LABEL: fptos_f32_i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w0, s0
; CHECK-NEXT:    ret
entry:
  %c = fptosi float %a to i8
  ret i8 %c
}

define i8 @fptou_f32_i8(float %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f32_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f32_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w0, s0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f32_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w0, s0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f32_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w0, s0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui float %a to i8
  ret i8 %c
}

define i128 @fptos_f32_i128(float %a) {
; CHECK-LABEL: fptos_f32_i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixsfti
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptosi float %a to i128
  ret i128 %c
}

define i128 @fptou_f32_i128(float %a) {
; CHECK-LABEL: fptou_f32_i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixunssfti
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptoui float %a to i128
  ret i128 %c
}

define i64 @fptos_f16_i64(half %a) {
; CHECK-NOFP16-LABEL: fptos_f16_i64:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzs x0, s0
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_f16_i64:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs x0, h0
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi half %a to i64
  ret i64 %c
}

define i64 @fptou_f16_i64(half %a) {
; CHECK-NOFP16-LABEL: fptou_f16_i64:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzu x0, s0
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_f16_i64:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu x0, h0
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptoui half %a to i64
  ret i64 %c
}

define i32 @fptos_f16_i32(half %a) {
; CHECK-NOFP16-LABEL: fptos_f16_i32:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_f16_i32:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs w0, h0
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi half %a to i32
  ret i32 %c
}

define i32 @fptou_f16_i32(half %a) {
; CHECK-NOFP16-LABEL: fptou_f16_i32:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzu w0, s0
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_f16_i32:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu w0, h0
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptoui half %a to i32
  ret i32 %c
}

define i16 @fptos_f16_i16(half %a) {
; CHECK-NOFP16-LABEL: fptos_f16_i16:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_f16_i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs w0, h0
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi half %a to i16
  ret i16 %c
}

define i16 @fptou_f16_i16(half %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f16_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f16_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w0, h0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f16_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzu w0, s0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f16_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w0, h0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui half %a to i16
  ret i16 %c
}

define i8 @fptos_f16_i8(half %a) {
; CHECK-NOFP16-LABEL: fptos_f16_i8:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_f16_i8:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs w0, h0
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi half %a to i8
  ret i8 %c
}

define i8 @fptou_f16_i8(half %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f16_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs w0, s0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f16_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w0, h0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f16_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzu w0, s0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f16_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w0, h0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui half %a to i8
  ret i8 %c
}

define i128 @fptos_f16_i128(half %a) {
; CHECK-NOFP16-SD-LABEL: fptos_f16_i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixhfti
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_f16_i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixhfti
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_f16_i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzs x0, s0
; CHECK-NOFP16-GI-NEXT:    asr x1, x0, #63
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_f16_i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs x0, h0
; CHECK-FP16-GI-NEXT:    asr x1, x0, #63
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi half %a to i128
  ret i128 %c
}

define i128 @fptou_f16_i128(half %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f16_i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixunshfti
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f16_i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixunshfti
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f16_i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    mov x1, xzr
; CHECK-NOFP16-GI-NEXT:    fcvtzu x0, s0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f16_i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu x0, h0
; CHECK-FP16-GI-NEXT:    mov x1, xzr
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui half %a to i128
  ret i128 %c
}

define i64 @fptos_f128_i64(fp128 %a) {
; CHECK-NOFP16-SD-LABEL: fptos_f128_i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixtfdi
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_f128_i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixtfdi
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_f128_i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    b __fixtfdi
;
; CHECK-FP16-GI-LABEL: fptos_f128_i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    b __fixtfdi
entry:
  %c = fptosi fp128 %a to i64
  ret i64 %c
}

define i64 @fptou_f128_i64(fp128 %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f128_i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixunstfdi
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f128_i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixunstfdi
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f128_i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    b __fixunstfdi
;
; CHECK-FP16-GI-LABEL: fptou_f128_i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    b __fixunstfdi
entry:
  %c = fptoui fp128 %a to i64
  ret i64 %c
}

define i32 @fptos_f128_i32(fp128 %a) {
; CHECK-NOFP16-SD-LABEL: fptos_f128_i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_f128_i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_f128_i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    b __fixtfsi
;
; CHECK-FP16-GI-LABEL: fptos_f128_i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    b __fixtfsi
entry:
  %c = fptosi fp128 %a to i32
  ret i32 %c
}

define i32 @fptou_f128_i32(fp128 %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f128_i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f128_i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixunstfsi
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f128_i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    b __fixunstfsi
;
; CHECK-FP16-GI-LABEL: fptou_f128_i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    b __fixunstfsi
entry:
  %c = fptoui fp128 %a to i32
  ret i32 %c
}

define i16 @fptos_f128_i16(fp128 %a) {
; CHECK-LABEL: fptos_f128_i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixtfsi
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptosi fp128 %a to i16
  ret i16 %c
}

define i16 @fptou_f128_i16(fp128 %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f128_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f128_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f128_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f128_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui fp128 %a to i16
  ret i16 %c
}

define i8 @fptos_f128_i8(fp128 %a) {
; CHECK-LABEL: fptos_f128_i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixtfsi
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptosi fp128 %a to i8
  ret i8 %c
}

define i8 @fptou_f128_i8(fp128 %a) {
; CHECK-NOFP16-SD-LABEL: fptou_f128_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_f128_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_f128_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_f128_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 16
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui fp128 %a to i8
  ret i8 %c
}

define i128 @fptos_f128_i128(fp128 %a) {
; CHECK-LABEL: fptos_f128_i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixtfti
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptosi fp128 %a to i128
  ret i128 %c
}

define i128 @fptou_f128_i128(fp128 %a) {
; CHECK-LABEL: fptou_f128_i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset w30, -16
; CHECK-NEXT:    bl __fixunstfti
; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT:    ret
entry:
  %c = fptoui fp128 %a to i128
  ret i128 %c
}

define void @fptos_store_f64_i64(double %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f64_i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs d0, d0
; CHECK-NOFP16-SD-NEXT:    str d0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_store_f64_i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs d0, d0
; CHECK-FP16-SD-NEXT:    str d0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f64_i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs x8, d0
; CHECK-NOFP16-GI-NEXT:    str x8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_store_f64_i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs x8, d0
; CHECK-FP16-GI-NEXT:    str x8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi double %a to i64
  store i64 %c, ptr %p
  ret void
}

define void @fptou_store_f64_i64(double %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f64_i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzu d0, d0
; CHECK-NOFP16-SD-NEXT:    str d0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f64_i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu d0, d0
; CHECK-FP16-SD-NEXT:    str d0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f64_i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu x8, d0
; CHECK-NOFP16-GI-NEXT:    str x8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f64_i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu x8, d0
; CHECK-FP16-GI-NEXT:    str x8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui double %a to i64
  store i64 %c, ptr %p
  ret void
}

define void @fptos_store_f64_i32(double %a, ptr %p) {
; CHECK-LABEL: fptos_store_f64_i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w8, d0
; CHECK-NEXT:    str w8, [x0]
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i32
  store i32 %c, ptr %p
  ret void
}

define void @fptou_store_f64_i32(double %a, ptr %p) {
; CHECK-LABEL: fptou_store_f64_i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu w8, d0
; CHECK-NEXT:    str w8, [x0]
; CHECK-NEXT:    ret
entry:
  %c = fptoui double %a to i32
  store i32 %c, ptr %p
  ret void
}

define void @fptos_store_f64_i16(double %a, ptr %p) {
; CHECK-LABEL: fptos_store_f64_i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w8, d0
; CHECK-NEXT:    strh w8, [x0]
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i16
  store i16 %c, ptr %p
  ret void
}

define void @fptou_store_f64_i16(double %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f64_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs w8, d0
; CHECK-NOFP16-SD-NEXT:    strh w8, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f64_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w8, d0
; CHECK-FP16-SD-NEXT:    strh w8, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f64_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, d0
; CHECK-NOFP16-GI-NEXT:    strh w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f64_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, d0
; CHECK-FP16-GI-NEXT:    strh w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui double %a to i16
  store i16 %c, ptr %p
  ret void
}

define void @fptos_store_f64_i8(double %a, ptr %p) {
; CHECK-LABEL: fptos_store_f64_i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs w8, d0
; CHECK-NEXT:    strb w8, [x0]
; CHECK-NEXT:    ret
entry:
  %c = fptosi double %a to i8
  store i8 %c, ptr %p
  ret void
}

define void @fptou_store_f64_i8(double %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f64_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs w8, d0
; CHECK-NOFP16-SD-NEXT:    strb w8, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f64_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w8, d0
; CHECK-FP16-SD-NEXT:    strb w8, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f64_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, d0
; CHECK-NOFP16-GI-NEXT:    strb w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f64_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, d0
; CHECK-FP16-GI-NEXT:    strb w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui double %a to i8
  store i8 %c, ptr %p
  ret void
}

define void @fptos_store_f32_i64(float %a, ptr %p) {
; CHECK-LABEL: fptos_store_f32_i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs x8, s0
; CHECK-NEXT:    str x8, [x0]
; CHECK-NEXT:    ret
entry:
  %c = fptosi float %a to i64
  store i64 %c, ptr %p
  ret void
}

define void @fptou_store_f32_i64(float %a, ptr %p) {
; CHECK-LABEL: fptou_store_f32_i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu x8, s0
; CHECK-NEXT:    str x8, [x0]
; CHECK-NEXT:    ret
entry:
  %c = fptoui float %a to i64
  store i64 %c, ptr %p
  ret void
}

define void @fptos_store_f32_i32(float %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f32_i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str s0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_store_f32_i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-FP16-SD-NEXT:    str s0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f32_i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-NOFP16-GI-NEXT:    str w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_store_f32_i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-FP16-GI-NEXT:    str w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi float %a to i32
  store i32 %c, ptr %p
  ret void
}

define void @fptou_store_f32_i32(float %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f32_i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzu s0, s0
; CHECK-NOFP16-SD-NEXT:    str s0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f32_i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu s0, s0
; CHECK-FP16-SD-NEXT:    str s0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f32_i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-NOFP16-GI-NEXT:    str w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f32_i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-FP16-GI-NEXT:    str w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui float %a to i32
  store i32 %c, ptr %p
  ret void
}

define void @fptos_store_f32_i16(float %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f32_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str h0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_store_f32_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-FP16-SD-NEXT:    str h0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f32_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-NOFP16-GI-NEXT:    strh w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_store_f32_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-FP16-GI-NEXT:    strh w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi float %a to i16
  store i16 %c, ptr %p
  ret void
}

define void @fptou_store_f32_i16(float %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f32_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str h0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f32_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-FP16-SD-NEXT:    str h0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f32_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-NOFP16-GI-NEXT:    strh w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f32_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-FP16-GI-NEXT:    strh w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui float %a to i16
  store i16 %c, ptr %p
  ret void
}

define void @fptos_store_f32_i8(float %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f32_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str b0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_store_f32_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-FP16-SD-NEXT:    str b0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f32_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-NOFP16-GI-NEXT:    strb w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_store_f32_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-FP16-GI-NEXT:    strb w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi float %a to i8
  store i8 %c, ptr %p
  ret void
}

define void @fptou_store_f32_i8(float %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f32_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str b0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f32_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-FP16-SD-NEXT:    str b0, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f32_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-NOFP16-GI-NEXT:    strb w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f32_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-FP16-GI-NEXT:    strb w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui float %a to i8
  store i8 %c, ptr %p
  ret void
}

define void @fptos_store_f16_i64(half %a, ptr %p) {
; CHECK-NOFP16-LABEL: fptos_store_f16_i64:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzs x8, s0
; CHECK-NOFP16-NEXT:    str x8, [x0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_store_f16_i64:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs x8, h0
; CHECK-FP16-NEXT:    str x8, [x0]
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi half %a to i64
  store i64 %c, ptr %p
  ret void
}

define void @fptou_store_f16_i64(half %a, ptr %p) {
; CHECK-NOFP16-LABEL: fptou_store_f16_i64:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvt s0, h0
; CHECK-NOFP16-NEXT:    fcvtzu x8, s0
; CHECK-NOFP16-NEXT:    str x8, [x0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_store_f16_i64:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu x8, h0
; CHECK-FP16-NEXT:    str x8, [x0]
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptoui half %a to i64
  store i64 %c, ptr %p
  ret void
}

define void @fptos_store_f16_i32(half %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f16_i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str s0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_store_f16_i32:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs w8, h0
; CHECK-FP16-NEXT:    str w8, [x0]
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f16_i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-NOFP16-GI-NEXT:    str w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi half %a to i32
  store i32 %c, ptr %p
  ret void
}

define void @fptou_store_f16_i32(half %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f16_i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzu s0, s0
; CHECK-NOFP16-SD-NEXT:    str s0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_store_f16_i32:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu w8, h0
; CHECK-FP16-NEXT:    str w8, [x0]
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f16_i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-NOFP16-GI-NEXT:    str w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptoui half %a to i32
  store i32 %c, ptr %p
  ret void
}

define void @fptos_store_f16_i16(half %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f16_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str h0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_store_f16_i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs w8, h0
; CHECK-FP16-NEXT:    strh w8, [x0]
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f16_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-NOFP16-GI-NEXT:    strh w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi half %a to i16
  store i16 %c, ptr %p
  ret void
}

define void @fptou_store_f16_i16(half %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f16_i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str h0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f16_i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w8, h0
; CHECK-FP16-SD-NEXT:    strh w8, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f16_i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-NOFP16-GI-NEXT:    strh w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f16_i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, h0
; CHECK-FP16-GI-NEXT:    strh w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui half %a to i16
  store i16 %c, ptr %p
  ret void
}

define void @fptos_store_f16_i8(half %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptos_store_f16_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str b0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_store_f16_i8:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs w8, h0
; CHECK-FP16-NEXT:    strb w8, [x0]
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_store_f16_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzs w8, s0
; CHECK-NOFP16-GI-NEXT:    strb w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi half %a to i8
  store i8 %c, ptr %p
  ret void
}

define void @fptou_store_f16_i8(half %a, ptr %p) {
; CHECK-NOFP16-SD-LABEL: fptou_store_f16_i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs s0, s0
; CHECK-NOFP16-SD-NEXT:    str b0, [x0]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_store_f16_i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs w8, h0
; CHECK-FP16-SD-NEXT:    strb w8, [x0]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_store_f16_i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvtzu w8, s0
; CHECK-NOFP16-GI-NEXT:    strb w8, [x0]
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_store_f16_i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu w8, h0
; CHECK-FP16-GI-NEXT:    strb w8, [x0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui half %a to i8
  store i8 %c, ptr %p
  ret void
}

define <2 x i64> @fptos_v2f64_v2i64(<2 x double> %a) {
; CHECK-LABEL: fptos_v2f64_v2i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x double> %a to <2 x i64>
  ret <2 x i64> %c
}

define <2 x i64> @fptou_v2f64_v2i64(<2 x double> %a) {
; CHECK-LABEL: fptou_v2f64_v2i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptoui <2 x double> %a to <2 x i64>
  ret <2 x i64> %c
}

define <3 x i64> @fptos_v3f64_v3i64(<3 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v3f64_v3i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v3f64_v3i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v3f64_v3i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v3f64_v3i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <3 x double> %a to <3 x i64>
  ret <3 x i64> %c
}

define <3 x i64> @fptou_v3f64_v3i64(<3 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f64_v3i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f64_v3i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f64_v3i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f64_v3i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x double> %a to <3 x i64>
  ret <3 x i64> %c
}

define <4 x i64> @fptos_v4f64_v4i64(<4 x double> %a) {
; CHECK-LABEL: fptos_v4f64_v4i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NEXT:    ret
entry:
  %c = fptosi <4 x double> %a to <4 x i64>
  ret <4 x i64> %c
}

define <4 x i64> @fptou_v4f64_v4i64(<4 x double> %a) {
; CHECK-LABEL: fptou_v4f64_v4i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NEXT:    ret
entry:
  %c = fptoui <4 x double> %a to <4 x i64>
  ret <4 x i64> %c
}

define <2 x i32> @fptos_v2f64_v2i32(<2 x double> %a) {
; CHECK-LABEL: fptos_v2f64_v2i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    xtn v0.2s, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x double> %a to <2 x i32>
  ret <2 x i32> %c
}

define <2 x i32> @fptou_v2f64_v2i32(<2 x double> %a) {
; CHECK-LABEL: fptou_v2f64_v2i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NEXT:    xtn v0.2s, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptoui <2 x double> %a to <2 x i32>
  ret <2 x i32> %c
}

define <3 x i32> @fptos_v3f64_v3i32(<3 x double> %a) {
; CHECK-LABEL: fptos_v3f64_v3i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <3 x double> %a to <3 x i32>
  ret <3 x i32> %c
}

define <3 x i32> @fptou_v3f64_v3i32(<3 x double> %a) {
; CHECK-LABEL: fptou_v3f64_v3i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <3 x double> %a to <3 x i32>
  ret <3 x i32> %c
}

define <4 x i32> @fptos_v4f64_v4i32(<4 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v4f64_v4i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v4f64_v4i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v4f64_v4i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v4f64_v4i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <4 x double> %a to <4 x i32>
  ret <4 x i32> %c
}

define <4 x i32> @fptou_v4f64_v4i32(<4 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f64_v4i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f64_v4i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f64_v4i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f64_v4i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x double> %a to <4 x i32>
  ret <4 x i32> %c
}

define <8 x i32> @fptos_v8f64_v8i32(<8 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f64_v8i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f64_v8i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f64_v8i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f64_v8i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x double> %a to <8 x i32>
  ret <8 x i32> %c
}

define <8 x i32> @fptou_v8f64_v8i32(<8 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f64_v8i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f64_v8i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f64_v8i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f64_v8i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x double> %a to <8 x i32>
  ret <8 x i32> %c
}

define <2 x i16> @fptos_v2f64_v2i16(<2 x double> %a) {
; CHECK-LABEL: fptos_v2f64_v2i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    xtn v0.2s, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x double> %a to <2 x i16>
  ret <2 x i16> %c
}

define <2 x i16> @fptou_v2f64_v2i16(<2 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f64_v2i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    xtn v0.2s, v0.2d
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f64_v2i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    xtn v0.2s, v0.2d
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f64_v2i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    xtn v0.2s, v0.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f64_v2i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    xtn v0.2s, v0.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x double> %a to <2 x i16>
  ret <2 x i16> %c
}

define <3 x i16> @fptos_v3f64_v3i16(<3 x double> %a) {
; CHECK-LABEL: fptos_v3f64_v3i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <3 x double> %a to <3 x i16>
  ret <3 x i16> %c
}

define <3 x i16> @fptou_v3f64_v3i16(<3 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f64_v3i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f64_v3i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f64_v3i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f64_v3i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x double> %a to <3 x i16>
  ret <3 x i16> %c
}

define <4 x i16> @fptos_v4f64_v4i16(<4 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v4f64_v4i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v4f64_v4i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v4f64_v4i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v4f64_v4i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <4 x double> %a to <4 x i16>
  ret <4 x i16> %c
}

define <4 x i16> @fptou_v4f64_v4i16(<4 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f64_v4i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f64_v4i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f64_v4i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f64_v4i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x double> %a to <4 x i16>
  ret <4 x i16> %c
}

define <8 x i16> @fptos_v8f64_v8i16(<8 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f64_v8i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    adrp x8, .LCPI84_0
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    xtn v6.2s, v3.2d
; CHECK-NOFP16-SD-NEXT:    xtn v5.2s, v2.2d
; CHECK-NOFP16-SD-NEXT:    xtn v4.2s, v1.2d
; CHECK-NOFP16-SD-NEXT:    xtn v3.2s, v0.2d
; CHECK-NOFP16-SD-NEXT:    ldr q0, [x8, :lo12:.LCPI84_0]
; CHECK-NOFP16-SD-NEXT:    tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f64_v8i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    adrp x8, .LCPI84_0
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    xtn v6.2s, v3.2d
; CHECK-FP16-SD-NEXT:    xtn v5.2s, v2.2d
; CHECK-FP16-SD-NEXT:    xtn v4.2s, v1.2d
; CHECK-FP16-SD-NEXT:    xtn v3.2s, v0.2d
; CHECK-FP16-SD-NEXT:    ldr q0, [x8, :lo12:.LCPI84_0]
; CHECK-FP16-SD-NEXT:    tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f64_v8i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f64_v8i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x double> %a to <8 x i16>
  ret <8 x i16> %c
}

define <8 x i16> @fptou_v8f64_v8i16(<8 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f64_v8i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    adrp x8, .LCPI85_0
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    xtn v6.2s, v3.2d
; CHECK-NOFP16-SD-NEXT:    xtn v5.2s, v2.2d
; CHECK-NOFP16-SD-NEXT:    xtn v4.2s, v1.2d
; CHECK-NOFP16-SD-NEXT:    xtn v3.2s, v0.2d
; CHECK-NOFP16-SD-NEXT:    ldr q0, [x8, :lo12:.LCPI85_0]
; CHECK-NOFP16-SD-NEXT:    tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f64_v8i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    adrp x8, .LCPI85_0
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    xtn v6.2s, v3.2d
; CHECK-FP16-SD-NEXT:    xtn v5.2s, v2.2d
; CHECK-FP16-SD-NEXT:    xtn v4.2s, v1.2d
; CHECK-FP16-SD-NEXT:    xtn v3.2s, v0.2d
; CHECK-FP16-SD-NEXT:    ldr q0, [x8, :lo12:.LCPI85_0]
; CHECK-FP16-SD-NEXT:    tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f64_v8i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f64_v8i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x double> %a to <8 x i16>
  ret <8 x i16> %c
}

define <16 x i16> @fptos_v16f64_v16i16(<16 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f64_v16i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-SD-NEXT:    adrp x8, .LCPI86_0
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    xtn v19.2s, v3.2d
; CHECK-NOFP16-SD-NEXT:    xtn v23.2s, v7.2d
; CHECK-NOFP16-SD-NEXT:    xtn v18.2s, v2.2d
; CHECK-NOFP16-SD-NEXT:    xtn v22.2s, v6.2d
; CHECK-NOFP16-SD-NEXT:    xtn v17.2s, v1.2d
; CHECK-NOFP16-SD-NEXT:    xtn v21.2s, v5.2d
; CHECK-NOFP16-SD-NEXT:    ldr q1, [x8, :lo12:.LCPI86_0]
; CHECK-NOFP16-SD-NEXT:    xtn v16.2s, v0.2d
; CHECK-NOFP16-SD-NEXT:    xtn v20.2s, v4.2d
; CHECK-NOFP16-SD-NEXT:    tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
; CHECK-NOFP16-SD-NEXT:    tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f64_v16i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-SD-NEXT:    adrp x8, .LCPI86_0
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-SD-NEXT:    xtn v19.2s, v3.2d
; CHECK-FP16-SD-NEXT:    xtn v23.2s, v7.2d
; CHECK-FP16-SD-NEXT:    xtn v18.2s, v2.2d
; CHECK-FP16-SD-NEXT:    xtn v22.2s, v6.2d
; CHECK-FP16-SD-NEXT:    xtn v17.2s, v1.2d
; CHECK-FP16-SD-NEXT:    xtn v21.2s, v5.2d
; CHECK-FP16-SD-NEXT:    ldr q1, [x8, :lo12:.LCPI86_0]
; CHECK-FP16-SD-NEXT:    xtn v16.2s, v0.2d
; CHECK-FP16-SD-NEXT:    xtn v20.2s, v4.2d
; CHECK-FP16-SD-NEXT:    tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
; CHECK-FP16-SD-NEXT:    tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f64_v16i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f64_v16i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-FP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x double> %a to <16 x i16>
  ret <16 x i16> %c
}

define <16 x i16> @fptou_v16f64_v16i16(<16 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f64_v16i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-SD-NEXT:    adrp x8, .LCPI87_0
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    xtn v19.2s, v3.2d
; CHECK-NOFP16-SD-NEXT:    xtn v23.2s, v7.2d
; CHECK-NOFP16-SD-NEXT:    xtn v18.2s, v2.2d
; CHECK-NOFP16-SD-NEXT:    xtn v22.2s, v6.2d
; CHECK-NOFP16-SD-NEXT:    xtn v17.2s, v1.2d
; CHECK-NOFP16-SD-NEXT:    xtn v21.2s, v5.2d
; CHECK-NOFP16-SD-NEXT:    ldr q1, [x8, :lo12:.LCPI87_0]
; CHECK-NOFP16-SD-NEXT:    xtn v16.2s, v0.2d
; CHECK-NOFP16-SD-NEXT:    xtn v20.2s, v4.2d
; CHECK-NOFP16-SD-NEXT:    tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
; CHECK-NOFP16-SD-NEXT:    tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f64_v16i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-SD-NEXT:    adrp x8, .LCPI87_0
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-SD-NEXT:    xtn v19.2s, v3.2d
; CHECK-FP16-SD-NEXT:    xtn v23.2s, v7.2d
; CHECK-FP16-SD-NEXT:    xtn v18.2s, v2.2d
; CHECK-FP16-SD-NEXT:    xtn v22.2s, v6.2d
; CHECK-FP16-SD-NEXT:    xtn v17.2s, v1.2d
; CHECK-FP16-SD-NEXT:    xtn v21.2s, v5.2d
; CHECK-FP16-SD-NEXT:    ldr q1, [x8, :lo12:.LCPI87_0]
; CHECK-FP16-SD-NEXT:    xtn v16.2s, v0.2d
; CHECK-FP16-SD-NEXT:    xtn v20.2s, v4.2d
; CHECK-FP16-SD-NEXT:    tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
; CHECK-FP16-SD-NEXT:    tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f64_v16i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v4.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v5.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v6.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v7.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f64_v16i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v4.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v5.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v6.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v7.2d, v7.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-FP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x double> %a to <16 x i16>
  ret <16 x i16> %c
}

define <2 x i8> @fptos_v2f64_v2i8(<2 x double> %a) {
; CHECK-LABEL: fptos_v2f64_v2i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    xtn v0.2s, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x double> %a to <2 x i8>
  ret <2 x i8> %c
}

define <2 x i8> @fptou_v2f64_v2i8(<2 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f64_v2i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    xtn v0.2s, v0.2d
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f64_v2i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    xtn v0.2s, v0.2d
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f64_v2i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    xtn v0.2s, v0.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f64_v2i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    xtn v0.2s, v0.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x double> %a to <2 x i8>
  ret <2 x i8> %c
}

define <3 x i8> @fptos_v3f64_v3i8(<3 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v3f64_v3i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-NOFP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v3f64_v3i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v3f64_v3i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fmov x2, d1
; CHECK-NOFP16-GI-NEXT:    // kill: def $w2 killed $w2 killed $x2
; CHECK-NOFP16-GI-NEXT:    mov d2, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    fmov x0, d0
; CHECK-NOFP16-GI-NEXT:    // kill: def $w0 killed $w0 killed $x0
; CHECK-NOFP16-GI-NEXT:    fmov x1, d2
; CHECK-NOFP16-GI-NEXT:    // kill: def $w1 killed $w1 killed $x1
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v3f64_v3i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fmov x2, d1
; CHECK-FP16-GI-NEXT:    // kill: def $w2 killed $w2 killed $x2
; CHECK-FP16-GI-NEXT:    mov d2, v0.d[1]
; CHECK-FP16-GI-NEXT:    fmov x0, d0
; CHECK-FP16-GI-NEXT:    // kill: def $w0 killed $w0 killed $x0
; CHECK-FP16-GI-NEXT:    fmov x1, d2
; CHECK-FP16-GI-NEXT:    // kill: def $w1 killed $w1 killed $x1
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <3 x double> %a to <3 x i8>
  ret <3 x i8> %c
}

define <3 x i8> @fptou_v3f64_v3i8(<3 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f64_v3i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-NOFP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f64_v3i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f64_v3i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fmov x2, d1
; CHECK-NOFP16-GI-NEXT:    // kill: def $w2 killed $w2 killed $x2
; CHECK-NOFP16-GI-NEXT:    mov d2, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    fmov x0, d0
; CHECK-NOFP16-GI-NEXT:    // kill: def $w0 killed $w0 killed $x0
; CHECK-NOFP16-GI-NEXT:    fmov x1, d2
; CHECK-NOFP16-GI-NEXT:    // kill: def $w1 killed $w1 killed $x1
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f64_v3i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-FP16-GI-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fmov x2, d1
; CHECK-FP16-GI-NEXT:    // kill: def $w2 killed $w2 killed $x2
; CHECK-FP16-GI-NEXT:    mov d2, v0.d[1]
; CHECK-FP16-GI-NEXT:    fmov x0, d0
; CHECK-FP16-GI-NEXT:    // kill: def $w0 killed $w0 killed $x0
; CHECK-FP16-GI-NEXT:    fmov x1, d2
; CHECK-FP16-GI-NEXT:    // kill: def $w1 killed $w1 killed $x1
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x double> %a to <3 x i8>
  ret <3 x i8> %c
}

define <4 x i8> @fptos_v4f64_v4i8(<4 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v4f64_v4i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v4f64_v4i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v4f64_v4i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v4f64_v4i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <4 x double> %a to <4 x i8>
  ret <4 x i8> %c
}

define <4 x i8> @fptou_v4f64_v4i8(<4 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f64_v4i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f64_v4i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f64_v4i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f64_v4i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x double> %a to <4 x i8>
  ret <4 x i8> %c
}

define <8 x i8> @fptos_v8f64_v8i8(<8 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f64_v8i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f64_v8i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-FP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f64_v8i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f64_v8i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x double> %a to <8 x i8>
  ret <8 x i8> %c
}

define <8 x i8> @fptou_v8f64_v8i8(<8 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f64_v8i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f64_v8i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-FP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f64_v8i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f64_v8i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x double> %a to <8 x i8>
  ret <8 x i8> %c
}

define <16 x i8> @fptos_v16f64_v16i8(<16 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f64_v16i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v4.8h, v6.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f64_v16i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-FP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v4.8h, v6.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f64_v16i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f64_v16i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-FP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x double> %a to <16 x i8>
  ret <16 x i8> %c
}

define <16 x i8> @fptou_v16f64_v16i8(<16 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f64_v16i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v4.8h, v6.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f64_v16i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-FP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v4.8h, v6.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f64_v16i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v4.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v5.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v6.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v7.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f64_v16i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v4.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v5.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v6.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v7.2d, v7.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-FP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x double> %a to <16 x i8>
  ret <16 x i8> %c
}

define <32 x i8> @fptos_v32f64_v32i8(<32 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v32f64_v32i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    ldp q16, q17, [sp]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-SD-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-SD-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v21.2d, v21.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v20.2d, v20.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v23.2d, v23.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v22.2d, v22.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v19.2d, v19.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v18.2d, v18.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v17.2d, v17.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v16.2d, v16.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v3.4s, v20.4s, v21.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.4s, v22.4s, v23.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v7.4s, v16.4s, v17.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v4.8h, v4.8h, v6.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v7.8h, v5.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v4.16b
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v32f64_v32i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    ldp q16, q17, [sp]
; CHECK-FP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-SD-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-FP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-SD-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-FP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-SD-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-FP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v21.2d, v21.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v20.2d, v20.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v23.2d, v23.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v22.2d, v22.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v19.2d, v19.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v18.2d, v18.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v17.2d, v17.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v16.2d, v16.2d
; CHECK-FP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-FP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v3.4s, v20.4s, v21.4s
; CHECK-FP16-SD-NEXT:    uzp1 v1.4s, v22.4s, v23.4s
; CHECK-FP16-SD-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-FP16-SD-NEXT:    uzp1 v7.4s, v16.4s, v17.4s
; CHECK-FP16-SD-NEXT:    uzp1 v4.8h, v4.8h, v6.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v2.8h, v7.8h, v5.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v4.16b
; CHECK-FP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v32f64_v32i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    ldp q16, q17, [sp]
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v16.2d, v16.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v17.2d, v17.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v18.2d, v18.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v19.2d, v19.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v20.2d, v20.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v21.2d, v21.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v22.2d, v22.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v23.2d, v23.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v4.4s, v16.4s, v17.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v6.4s, v20.4s, v21.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v7.4s, v22.4s, v23.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v32f64_v32i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    ldp q16, q17, [sp]
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v16.2d, v16.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v17.2d, v17.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v18.2d, v18.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v19.2d, v19.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v20.2d, v20.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v21.2d, v21.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v22.2d, v22.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v23.2d, v23.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-FP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v4.4s, v16.4s, v17.4s
; CHECK-FP16-GI-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-FP16-GI-NEXT:    uzp1 v6.4s, v20.4s, v21.4s
; CHECK-FP16-GI-NEXT:    uzp1 v7.4s, v22.4s, v23.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-FP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <32 x double> %a to <32 x i8>
  ret <32 x i8> %c
}

define <32 x i8> @fptou_v32f64_v32i8(<32 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v32f64_v32i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    ldp q16, q17, [sp]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-NOFP16-SD-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-NOFP16-SD-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v21.2d, v21.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v20.2d, v20.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v23.2d, v23.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v22.2d, v22.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v19.2d, v19.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v18.2d, v18.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v17.2d, v17.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v16.2d, v16.2d
; CHECK-NOFP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v3.4s, v20.4s, v21.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.4s, v22.4s, v23.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v7.4s, v16.4s, v17.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v4.8h, v4.8h, v6.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v7.8h, v5.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v4.16b
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v32f64_v32i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    ldp q16, q17, [sp]
; CHECK-FP16-SD-NEXT:    fcvtzs v7.2d, v7.2d
; CHECK-FP16-SD-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-FP16-SD-NEXT:    fcvtzs v6.2d, v6.2d
; CHECK-FP16-SD-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-FP16-SD-NEXT:    fcvtzs v5.2d, v5.2d
; CHECK-FP16-SD-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-FP16-SD-NEXT:    fcvtzs v4.2d, v4.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v21.2d, v21.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v20.2d, v20.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v23.2d, v23.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v22.2d, v22.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v19.2d, v19.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v18.2d, v18.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v17.2d, v17.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v16.2d, v16.2d
; CHECK-FP16-SD-NEXT:    uzp1 v6.4s, v6.4s, v7.4s
; CHECK-FP16-SD-NEXT:    uzp1 v4.4s, v4.4s, v5.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.4s, v2.4s, v3.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-SD-NEXT:    uzp1 v3.4s, v20.4s, v21.4s
; CHECK-FP16-SD-NEXT:    uzp1 v1.4s, v22.4s, v23.4s
; CHECK-FP16-SD-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-FP16-SD-NEXT:    uzp1 v7.4s, v16.4s, v17.4s
; CHECK-FP16-SD-NEXT:    uzp1 v4.8h, v4.8h, v6.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v2.8h, v7.8h, v5.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v4.16b
; CHECK-FP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v32f64_v32i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    ldp q16, q17, [sp]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v4.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v5.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v6.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v7.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v16.2d, v16.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v17.2d, v17.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v18.2d, v18.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v19.2d, v19.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v20.2d, v20.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v21.2d, v21.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v22.2d, v22.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v23.2d, v23.2d
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v4.4s, v16.4s, v17.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v6.4s, v20.4s, v21.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v7.4s, v22.4s, v23.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v32f64_v32i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    ldp q16, q17, [sp]
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    ldp q18, q19, [sp, #32]
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    ldp q20, q21, [sp, #64]
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    ldp q22, q23, [sp, #96]
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v4.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v5.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v6.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v7.2d, v7.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v16.2d, v16.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v17.2d, v17.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v18.2d, v18.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v19.2d, v19.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v20.2d, v20.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v21.2d, v21.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v22.2d, v22.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v23.2d, v23.2d
; CHECK-FP16-GI-NEXT:    uzp1 v0.4s, v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v1.4s, v2.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v2.4s, v4.4s, v5.4s
; CHECK-FP16-GI-NEXT:    uzp1 v3.4s, v6.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v4.4s, v16.4s, v17.4s
; CHECK-FP16-GI-NEXT:    uzp1 v5.4s, v18.4s, v19.4s
; CHECK-FP16-GI-NEXT:    uzp1 v6.4s, v20.4s, v21.4s
; CHECK-FP16-GI-NEXT:    uzp1 v7.4s, v22.4s, v23.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-FP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <32 x double> %a to <32 x i8>
  ret <32 x i8> %c
}

define <2 x i128> @fptos_v2f64_v2i128(<2 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f64_v2i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    bl __fixdfti
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov x19, x0
; CHECK-NOFP16-SD-NEXT:    mov x20, x1
; CHECK-NOFP16-SD-NEXT:    mov d0, v0.d[1]
; CHECK-NOFP16-SD-NEXT:    bl __fixdfti
; CHECK-NOFP16-SD-NEXT:    mov x2, x0
; CHECK-NOFP16-SD-NEXT:    mov x3, x1
; CHECK-NOFP16-SD-NEXT:    mov x0, x19
; CHECK-NOFP16-SD-NEXT:    mov x1, x20
; CHECK-NOFP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f64_v2i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    bl __fixdfti
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    mov x19, x0
; CHECK-FP16-SD-NEXT:    mov x20, x1
; CHECK-FP16-SD-NEXT:    mov d0, v0.d[1]
; CHECK-FP16-SD-NEXT:    bl __fixdfti
; CHECK-FP16-SD-NEXT:    mov x2, x0
; CHECK-FP16-SD-NEXT:    mov x3, x1
; CHECK-FP16-SD-NEXT:    mov x0, x19
; CHECK-FP16-SD-NEXT:    mov x1, x20
; CHECK-FP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f64_v2i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-NOFP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-NOFP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-NOFP16-GI-NEXT:    mov d8, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    bl __fixdfti
; CHECK-NOFP16-GI-NEXT:    fmov d0, d8
; CHECK-NOFP16-GI-NEXT:    mov x19, x0
; CHECK-NOFP16-GI-NEXT:    mov x20, x1
; CHECK-NOFP16-GI-NEXT:    bl __fixdfti
; CHECK-NOFP16-GI-NEXT:    mov x2, x0
; CHECK-NOFP16-GI-NEXT:    mov x3, x1
; CHECK-NOFP16-GI-NEXT:    mov x0, x19
; CHECK-NOFP16-GI-NEXT:    mov x1, x20
; CHECK-NOFP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-NOFP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f64_v2i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-FP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-FP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-FP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-FP16-GI-NEXT:    mov d8, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    bl __fixdfti
; CHECK-FP16-GI-NEXT:    fmov d0, d8
; CHECK-FP16-GI-NEXT:    mov x19, x0
; CHECK-FP16-GI-NEXT:    mov x20, x1
; CHECK-FP16-GI-NEXT:    bl __fixdfti
; CHECK-FP16-GI-NEXT:    mov x2, x0
; CHECK-FP16-GI-NEXT:    mov x3, x1
; CHECK-FP16-GI-NEXT:    mov x0, x19
; CHECK-FP16-GI-NEXT:    mov x1, x20
; CHECK-FP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-FP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x double> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i128> @fptou_v2f64_v2i128(<2 x double> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f64_v2i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    bl __fixunsdfti
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov x19, x0
; CHECK-NOFP16-SD-NEXT:    mov x20, x1
; CHECK-NOFP16-SD-NEXT:    mov d0, v0.d[1]
; CHECK-NOFP16-SD-NEXT:    bl __fixunsdfti
; CHECK-NOFP16-SD-NEXT:    mov x2, x0
; CHECK-NOFP16-SD-NEXT:    mov x3, x1
; CHECK-NOFP16-SD-NEXT:    mov x0, x19
; CHECK-NOFP16-SD-NEXT:    mov x1, x20
; CHECK-NOFP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f64_v2i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    bl __fixunsdfti
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    mov x19, x0
; CHECK-FP16-SD-NEXT:    mov x20, x1
; CHECK-FP16-SD-NEXT:    mov d0, v0.d[1]
; CHECK-FP16-SD-NEXT:    bl __fixunsdfti
; CHECK-FP16-SD-NEXT:    mov x2, x0
; CHECK-FP16-SD-NEXT:    mov x3, x1
; CHECK-FP16-SD-NEXT:    mov x0, x19
; CHECK-FP16-SD-NEXT:    mov x1, x20
; CHECK-FP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f64_v2i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-NOFP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-NOFP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-NOFP16-GI-NEXT:    mov d8, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    bl __fixunsdfti
; CHECK-NOFP16-GI-NEXT:    fmov d0, d8
; CHECK-NOFP16-GI-NEXT:    mov x19, x0
; CHECK-NOFP16-GI-NEXT:    mov x20, x1
; CHECK-NOFP16-GI-NEXT:    bl __fixunsdfti
; CHECK-NOFP16-GI-NEXT:    mov x2, x0
; CHECK-NOFP16-GI-NEXT:    mov x3, x1
; CHECK-NOFP16-GI-NEXT:    mov x0, x19
; CHECK-NOFP16-GI-NEXT:    mov x1, x20
; CHECK-NOFP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-NOFP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f64_v2i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-FP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-FP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-FP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-FP16-GI-NEXT:    mov d8, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    bl __fixunsdfti
; CHECK-FP16-GI-NEXT:    fmov d0, d8
; CHECK-FP16-GI-NEXT:    mov x19, x0
; CHECK-FP16-GI-NEXT:    mov x20, x1
; CHECK-FP16-GI-NEXT:    bl __fixunsdfti
; CHECK-FP16-GI-NEXT:    mov x2, x0
; CHECK-FP16-GI-NEXT:    mov x3, x1
; CHECK-FP16-GI-NEXT:    mov x0, x19
; CHECK-FP16-GI-NEXT:    mov x1, x20
; CHECK-FP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-FP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x double> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i64> @fptos_v2f32_v2i64(<2 x float> %a) {
; CHECK-LABEL: fptos_v2f32_v2i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x float> %a to <2 x i64>
  ret <2 x i64> %c
}

define <2 x i64> @fptou_v2f32_v2i64(<2 x float> %a) {
; CHECK-LABEL: fptou_v2f32_v2i64:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NEXT:    ret
entry:
  %c = fptoui <2 x float> %a to <2 x i64>
  ret <2 x i64> %c
}

define <3 x i64> @fptos_v3f32_v3i64(<3 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v3f32_v3i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v0.2d, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-SD-NEXT:    fmov d0, d3
; CHECK-NOFP16-SD-NEXT:    ext v1.16b, v3.16b, v3.16b, #8
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v3f32_v3i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-SD-NEXT:    fcvtl2 v0.2d, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v0.2d
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-SD-NEXT:    fmov d0, d3
; CHECK-FP16-SD-NEXT:    ext v1.16b, v3.16b, v3.16b, #8
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v3f32_v3i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    mov v1.s[0], v0.s[2]
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v3f32_v3i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    mov v1.s[0], v0.s[2]
; CHECK-FP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v1.2d
; CHECK-FP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <3 x float> %a to <3 x i64>
  ret <3 x i64> %c
}

define <3 x i64> @fptou_v3f32_v3i64(<3 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f32_v3i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v0.2d, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-SD-NEXT:    fmov d0, d3
; CHECK-NOFP16-SD-NEXT:    ext v1.16b, v3.16b, v3.16b, #8
; CHECK-NOFP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f32_v3i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-SD-NEXT:    fcvtl2 v0.2d, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v3.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v2.2d, v0.2d
; CHECK-FP16-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-SD-NEXT:    fmov d0, d3
; CHECK-FP16-SD-NEXT:    ext v1.16b, v3.16b, v3.16b, #8
; CHECK-FP16-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f32_v3i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    mov v1.s[0], v0.s[2]
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f32_v3i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    mov v1.s[0], v0.s[2]
; CHECK-FP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v1.2d
; CHECK-FP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x float> %a to <3 x i64>
  ret <3 x i64> %c
}

define <4 x i64> @fptos_v4f32_v4i64(<4 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v4f32_v4i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.2d, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v4f32_v4i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl2 v1.2d, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v4f32_v4i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v4f32_v4i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <4 x float> %a to <4 x i64>
  ret <4 x i64> %c
}

define <4 x i64> @fptou_v4f32_v4i64(<4 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f32_v4i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.2d, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f32_v4i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl2 v1.2d, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-FP16-SD-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f32_v4i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f32_v4i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x float> %a to <4 x i64>
  ret <4 x i64> %c
}

define <8 x i64> @fptos_v8f32_v8i64(<8 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f32_v8i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v4.2d, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtl v5.2d, v1.2s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f32_v8i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-FP16-SD-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtl2 v4.2d, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtl v5.2d, v1.2s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v1.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v3.2d, v4.2d
; CHECK-FP16-SD-NEXT:    fcvtzs v2.2d, v5.2d
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f32_v8i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v5.2d, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f32_v8i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtl v4.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v5.2d, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v5.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x float> %a to <8 x i64>
  ret <8 x i64> %c
}

define <8 x i64> @fptou_v8f32_v8i64(<8 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f32_v8i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v4.2d, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtl v5.2d, v1.2s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.2d, v2.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.2d, v3.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.2d, v4.2d
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.2d, v5.2d
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f32_v8i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-FP16-SD-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtl2 v4.2d, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtl v5.2d, v1.2s
; CHECK-FP16-SD-NEXT:    fcvtzu v0.2d, v2.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v1.2d, v3.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v3.2d, v4.2d
; CHECK-FP16-SD-NEXT:    fcvtzu v2.2d, v5.2d
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f32_v8i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v5.2d, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f32_v8i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v2.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v3.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtl v4.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v5.2d, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v5.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x float> %a to <8 x i64>
  ret <8 x i64> %c
}

define <2 x i32> @fptos_v2f32_v2i32(<2 x float> %a) {
; CHECK-LABEL: fptos_v2f32_v2i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x float> %a to <2 x i32>
  ret <2 x i32> %c
}

define <2 x i32> @fptou_v2f32_v2i32(<2 x float> %a) {
; CHECK-LABEL: fptou_v2f32_v2i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <2 x float> %a to <2 x i32>
  ret <2 x i32> %c
}

define <3 x i32> @fptos_v3f32_v3i32(<3 x float> %a) {
; CHECK-LABEL: fptos_v3f32_v3i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <3 x float> %a to <3 x i32>
  ret <3 x i32> %c
}

define <3 x i32> @fptou_v3f32_v3i32(<3 x float> %a) {
; CHECK-LABEL: fptou_v3f32_v3i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <3 x float> %a to <3 x i32>
  ret <3 x i32> %c
}

define <4 x i32> @fptos_v4f32_v4i32(<4 x float> %a) {
; CHECK-LABEL: fptos_v4f32_v4i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <4 x float> %a to <4 x i32>
  ret <4 x i32> %c
}

define <4 x i32> @fptou_v4f32_v4i32(<4 x float> %a) {
; CHECK-LABEL: fptou_v4f32_v4i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <4 x float> %a to <4 x i32>
  ret <4 x i32> %c
}

define <8 x i32> @fptos_v8f32_v8i32(<8 x float> %a) {
; CHECK-LABEL: fptos_v8f32_v8i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <8 x float> %a to <8 x i32>
  ret <8 x i32> %c
}

define <8 x i32> @fptou_v8f32_v8i32(<8 x float> %a) {
; CHECK-LABEL: fptou_v8f32_v8i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <8 x float> %a to <8 x i32>
  ret <8 x i32> %c
}

define <2 x i16> @fptos_v2f32_v2i16(<2 x float> %a) {
; CHECK-LABEL: fptos_v2f32_v2i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x float> %a to <2 x i16>
  ret <2 x i16> %c
}

define <2 x i16> @fptou_v2f32_v2i16(<2 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f32_v2i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f32_v2i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f32_v2i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f32_v2i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x float> %a to <2 x i16>
  ret <2 x i16> %c
}

define <3 x i16> @fptos_v3f32_v3i16(<3 x float> %a) {
; CHECK-LABEL: fptos_v3f32_v3i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <3 x float> %a to <3 x i16>
  ret <3 x i16> %c
}

define <3 x i16> @fptou_v3f32_v3i16(<3 x float> %a) {
; CHECK-LABEL: fptou_v3f32_v3i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <3 x float> %a to <3 x i16>
  ret <3 x i16> %c
}

define <4 x i16> @fptos_v4f32_v4i16(<4 x float> %a) {
; CHECK-LABEL: fptos_v4f32_v4i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <4 x float> %a to <4 x i16>
  ret <4 x i16> %c
}

define <4 x i16> @fptou_v4f32_v4i16(<4 x float> %a) {
; CHECK-LABEL: fptou_v4f32_v4i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <4 x float> %a to <4 x i16>
  ret <4 x i16> %c
}

define <8 x i16> @fptos_v8f32_v8i16(<8 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f32_v8i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f32_v8i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f32_v8i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f32_v8i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x float> %a to <8 x i16>
  ret <8 x i16> %c
}

define <8 x i16> @fptou_v8f32_v8i16(<8 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f32_v8i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f32_v8i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f32_v8i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f32_v8i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x float> %a to <8 x i16>
  ret <8 x i16> %c
}

define <16 x i16> @fptos_v16f32_v16i16(<16 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f32_v16i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f32_v16i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f32_v16i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f32_v16i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x float> %a to <16 x i16>
  ret <16 x i16> %c
}

define <16 x i16> @fptou_v16f32_v16i16(<16 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f32_v16i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f32_v16i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f32_v16i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f32_v16i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x float> %a to <16 x i16>
  ret <16 x i16> %c
}

define <2 x i8> @fptos_v2f32_v2i8(<2 x float> %a) {
; CHECK-LABEL: fptos_v2f32_v2i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x float> %a to <2 x i8>
  ret <2 x i8> %c
}

define <2 x i8> @fptou_v2f32_v2i8(<2 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f32_v2i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f32_v2i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f32_v2i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f32_v2i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x float> %a to <2 x i8>
  ret <2 x i8> %c
}

define <3 x i8> @fptos_v3f32_v3i8(<3 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v3f32_v3i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-NOFP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v3f32_v3i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v3f32_v3i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    mov s1, v0.s[1]
; CHECK-NOFP16-GI-NEXT:    mov s2, v0.s[2]
; CHECK-NOFP16-GI-NEXT:    fmov w0, s0
; CHECK-NOFP16-GI-NEXT:    fmov w1, s1
; CHECK-NOFP16-GI-NEXT:    fmov w2, s2
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v3f32_v3i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    mov s1, v0.s[1]
; CHECK-FP16-GI-NEXT:    mov s2, v0.s[2]
; CHECK-FP16-GI-NEXT:    fmov w0, s0
; CHECK-FP16-GI-NEXT:    fmov w1, s1
; CHECK-FP16-GI-NEXT:    fmov w2, s2
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <3 x float> %a to <3 x i8>
  ret <3 x i8> %c
}

define <3 x i8> @fptou_v3f32_v3i8(<3 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f32_v3i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-NOFP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f32_v3i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f32_v3i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    mov s1, v0.s[1]
; CHECK-NOFP16-GI-NEXT:    mov s2, v0.s[2]
; CHECK-NOFP16-GI-NEXT:    fmov w0, s0
; CHECK-NOFP16-GI-NEXT:    fmov w1, s1
; CHECK-NOFP16-GI-NEXT:    fmov w2, s2
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f32_v3i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    mov s1, v0.s[1]
; CHECK-FP16-GI-NEXT:    mov s2, v0.s[2]
; CHECK-FP16-GI-NEXT:    fmov w0, s0
; CHECK-FP16-GI-NEXT:    fmov w1, s1
; CHECK-FP16-GI-NEXT:    fmov w2, s2
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x float> %a to <3 x i8>
  ret <3 x i8> %c
}

define <4 x i8> @fptos_v4f32_v4i8(<4 x float> %a) {
; CHECK-LABEL: fptos_v4f32_v4i8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <4 x float> %a to <4 x i8>
  ret <4 x i8> %c
}

define <4 x i8> @fptou_v4f32_v4i8(<4 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f32_v4i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f32_v4i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f32_v4i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f32_v4i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x float> %a to <4 x i8>
  ret <4 x i8> %c
}

define <8 x i8> @fptos_v8f32_v8i8(<8 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f32_v8i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f32_v8i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f32_v8i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f32_v8i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x float> %a to <8 x i8>
  ret <8 x i8> %c
}

define <8 x i8> @fptou_v8f32_v8i8(<8 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f32_v8i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f32_v8i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f32_v8i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f32_v8i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x float> %a to <8 x i8>
  ret <8 x i8> %c
}

define <16 x i8> @fptos_v16f32_v16i8(<16 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f32_v16i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f32_v16i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f32_v16i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f32_v16i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x float> %a to <16 x i8>
  ret <16 x i8> %c
}

define <16 x i8> @fptou_v16f32_v16i8(<16 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f32_v16i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f32_v16i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f32_v16i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f32_v16i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x float> %a to <16 x i8>
  ret <16 x i8> %c
}

define <32 x i8> @fptos_v32f32_v32i8(<32 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v32f32_v32i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v6.8h, v7.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v3.8h, v4.8h, v5.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.16b, v3.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v32f32_v32i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v6.8h, v7.8h
; CHECK-FP16-SD-NEXT:    uzp1 v3.8h, v4.8h, v5.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-FP16-SD-NEXT:    uzp1 v1.16b, v3.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v32f32_v32i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v32f32_v32i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-FP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <32 x float> %a to <32 x i8>
  ret <32 x i8> %c
}

define <32 x i8> @fptou_v32f32_v32i8(<32 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v32f32_v32i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v6.8h, v7.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v3.8h, v4.8h, v5.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.16b, v3.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v32f32_v32i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-FP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v3.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-SD-NEXT:    uzp1 v1.8h, v6.8h, v7.8h
; CHECK-FP16-SD-NEXT:    uzp1 v3.8h, v4.8h, v5.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v2.16b
; CHECK-FP16-SD-NEXT:    uzp1 v1.16b, v3.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v32f32_v32i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v4.4s, v4.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v5.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v6.4s, v6.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v7.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v32f32_v32i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v4.4s, v4.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v5.4s, v5.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v6.4s, v6.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v7.4s, v7.4s
; CHECK-FP16-GI-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v1.8h, v2.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v2.8h, v4.8h, v5.8h
; CHECK-FP16-GI-NEXT:    uzp1 v3.8h, v6.8h, v7.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <32 x float> %a to <32 x i8>
  ret <32 x i8> %c
}

define <2 x i128> @fptos_v2f32_v2i128(<2 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f32_v2i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-NOFP16-SD-NEXT:    bl __fixsfti
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov x19, x0
; CHECK-NOFP16-SD-NEXT:    mov x20, x1
; CHECK-NOFP16-SD-NEXT:    mov s0, v0.s[1]
; CHECK-NOFP16-SD-NEXT:    bl __fixsfti
; CHECK-NOFP16-SD-NEXT:    mov x2, x0
; CHECK-NOFP16-SD-NEXT:    mov x3, x1
; CHECK-NOFP16-SD-NEXT:    mov x0, x19
; CHECK-NOFP16-SD-NEXT:    mov x1, x20
; CHECK-NOFP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f32_v2i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-FP16-SD-NEXT:    bl __fixsfti
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    mov x19, x0
; CHECK-FP16-SD-NEXT:    mov x20, x1
; CHECK-FP16-SD-NEXT:    mov s0, v0.s[1]
; CHECK-FP16-SD-NEXT:    bl __fixsfti
; CHECK-FP16-SD-NEXT:    mov x2, x0
; CHECK-FP16-SD-NEXT:    mov x3, x1
; CHECK-FP16-SD-NEXT:    mov x0, x19
; CHECK-FP16-SD-NEXT:    mov x1, x20
; CHECK-FP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f32_v2i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-NOFP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-NOFP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    mov s8, v0.s[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-NOFP16-GI-NEXT:    bl __fixsfti
; CHECK-NOFP16-GI-NEXT:    fmov s0, s8
; CHECK-NOFP16-GI-NEXT:    mov x19, x0
; CHECK-NOFP16-GI-NEXT:    mov x20, x1
; CHECK-NOFP16-GI-NEXT:    bl __fixsfti
; CHECK-NOFP16-GI-NEXT:    mov x2, x0
; CHECK-NOFP16-GI-NEXT:    mov x3, x1
; CHECK-NOFP16-GI-NEXT:    mov x0, x19
; CHECK-NOFP16-GI-NEXT:    mov x1, x20
; CHECK-NOFP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-NOFP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f32_v2i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-FP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-FP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-FP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    mov s8, v0.s[1]
; CHECK-FP16-GI-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-FP16-GI-NEXT:    bl __fixsfti
; CHECK-FP16-GI-NEXT:    fmov s0, s8
; CHECK-FP16-GI-NEXT:    mov x19, x0
; CHECK-FP16-GI-NEXT:    mov x20, x1
; CHECK-FP16-GI-NEXT:    bl __fixsfti
; CHECK-FP16-GI-NEXT:    mov x2, x0
; CHECK-FP16-GI-NEXT:    mov x3, x1
; CHECK-FP16-GI-NEXT:    mov x0, x19
; CHECK-FP16-GI-NEXT:    mov x1, x20
; CHECK-FP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-FP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x float> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i128> @fptou_v2f32_v2i128(<2 x float> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f32_v2i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-NOFP16-SD-NEXT:    bl __fixunssfti
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov x19, x0
; CHECK-NOFP16-SD-NEXT:    mov x20, x1
; CHECK-NOFP16-SD-NEXT:    mov s0, v0.s[1]
; CHECK-NOFP16-SD-NEXT:    bl __fixunssfti
; CHECK-NOFP16-SD-NEXT:    mov x2, x0
; CHECK-NOFP16-SD-NEXT:    mov x3, x1
; CHECK-NOFP16-SD-NEXT:    mov x0, x19
; CHECK-NOFP16-SD-NEXT:    mov x1, x20
; CHECK-NOFP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f32_v2i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-FP16-SD-NEXT:    bl __fixunssfti
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    mov x19, x0
; CHECK-FP16-SD-NEXT:    mov x20, x1
; CHECK-FP16-SD-NEXT:    mov s0, v0.s[1]
; CHECK-FP16-SD-NEXT:    bl __fixunssfti
; CHECK-FP16-SD-NEXT:    mov x2, x0
; CHECK-FP16-SD-NEXT:    mov x3, x1
; CHECK-FP16-SD-NEXT:    mov x0, x19
; CHECK-FP16-SD-NEXT:    mov x1, x20
; CHECK-FP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f32_v2i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-NOFP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-NOFP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    mov s8, v0.s[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-NOFP16-GI-NEXT:    bl __fixunssfti
; CHECK-NOFP16-GI-NEXT:    fmov s0, s8
; CHECK-NOFP16-GI-NEXT:    mov x19, x0
; CHECK-NOFP16-GI-NEXT:    mov x20, x1
; CHECK-NOFP16-GI-NEXT:    bl __fixunssfti
; CHECK-NOFP16-GI-NEXT:    mov x2, x0
; CHECK-NOFP16-GI-NEXT:    mov x3, x1
; CHECK-NOFP16-GI-NEXT:    mov x0, x19
; CHECK-NOFP16-GI-NEXT:    mov x1, x20
; CHECK-NOFP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-NOFP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f32_v2i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    str d8, [sp, #-32]! // 8-byte Folded Spill
; CHECK-FP16-GI-NEXT:    str x30, [sp, #8] // 8-byte Spill
; CHECK-FP16-GI-NEXT:    stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -24
; CHECK-FP16-GI-NEXT:    .cfi_offset b8, -32
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    mov s8, v0.s[1]
; CHECK-FP16-GI-NEXT:    // kill: def $s0 killed $s0 killed $q0
; CHECK-FP16-GI-NEXT:    bl __fixunssfti
; CHECK-FP16-GI-NEXT:    fmov s0, s8
; CHECK-FP16-GI-NEXT:    mov x19, x0
; CHECK-FP16-GI-NEXT:    mov x20, x1
; CHECK-FP16-GI-NEXT:    bl __fixunssfti
; CHECK-FP16-GI-NEXT:    mov x2, x0
; CHECK-FP16-GI-NEXT:    mov x3, x1
; CHECK-FP16-GI-NEXT:    mov x0, x19
; CHECK-FP16-GI-NEXT:    mov x1, x20
; CHECK-FP16-GI-NEXT:    ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ldr x30, [sp, #8] // 8-byte Reload
; CHECK-FP16-GI-NEXT:    ldr d8, [sp], #32 // 8-byte Folded Reload
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x float> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i64> @fptos_v2f16_v2i64(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f16_v2i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvtzs x8, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzs x9, s1
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x9
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f16_v2i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-FP16-SD-NEXT:    fcvtzs x8, h0
; CHECK-FP16-SD-NEXT:    fcvtzs x9, h1
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x9
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f16_v2i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f16_v2i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x half> %a to <2 x i64>
  ret <2 x i64> %c
}

define <2 x i64> @fptou_v2f16_v2i64(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f16_v2i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvtzu x8, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzu x9, s1
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x9
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f16_v2i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-FP16-SD-NEXT:    fcvtzu x8, h0
; CHECK-FP16-SD-NEXT:    fcvtzu x9, h1
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x9
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f16_v2i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f16_v2i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl v0.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v0.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x half> %a to <2 x i64>
  ret <2 x i64> %c
}

define <3 x i64> @fptos_v3f16_v3i64(<3 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v3f16_v3i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s2, h2
; CHECK-NOFP16-SD-NEXT:    fcvtzs x8, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzs x9, s1
; CHECK-NOFP16-SD-NEXT:    fcvtzs x10, s2
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    fmov d1, x9
; CHECK-NOFP16-SD-NEXT:    fmov d2, x10
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v3f16_v3i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h2, v0.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzs x8, h0
; CHECK-FP16-SD-NEXT:    fcvtzs x9, h1
; CHECK-FP16-SD-NEXT:    fcvtzs x10, h2
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    fmov d1, x9
; CHECK-FP16-SD-NEXT:    fmov d2, x10
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v3f16_v3i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v3f16_v3i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <3 x half> %a to <3 x i64>
  ret <3 x i64> %c
}

define <3 x i64> @fptou_v3f16_v3i64(<3 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f16_v3i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s2, h2
; CHECK-NOFP16-SD-NEXT:    fcvtzu x8, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzu x9, s1
; CHECK-NOFP16-SD-NEXT:    fcvtzu x10, s2
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    fmov d1, x9
; CHECK-NOFP16-SD-NEXT:    fmov d2, x10
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f16_v3i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    mov h1, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h2, v0.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzu x8, h0
; CHECK-FP16-SD-NEXT:    fcvtzu x9, h1
; CHECK-FP16-SD-NEXT:    fcvtzu x10, h2
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    fmov d1, x9
; CHECK-FP16-SD-NEXT:    fmov d2, x10
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f16_v3i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-NOFP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f16_v3i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v2.2d
; CHECK-FP16-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
; CHECK-FP16-GI-NEXT:    mov d1, v0.d[1]
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x half> %a to <3 x i64>
  ret <3 x i64> %c
}

define <4 x i64> @fptos_v4f16_v4i64(<4 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v4f16_v4i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    mov h1, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h2, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h3, v0.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s2, h2
; CHECK-NOFP16-SD-NEXT:    fcvt s3, h3
; CHECK-NOFP16-SD-NEXT:    fcvtzs x8, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzs x9, s1
; CHECK-NOFP16-SD-NEXT:    fcvtzs x10, s2
; CHECK-NOFP16-SD-NEXT:    fcvtzs x11, s3
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    fmov d1, x9
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x10
; CHECK-NOFP16-SD-NEXT:    mov v1.d[1], x11
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v4f16_v4i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    mov h1, v0.h[2]
; CHECK-FP16-SD-NEXT:    mov h2, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h3, v0.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzs x8, h0
; CHECK-FP16-SD-NEXT:    fcvtzs x9, h1
; CHECK-FP16-SD-NEXT:    fcvtzs x10, h2
; CHECK-FP16-SD-NEXT:    fcvtzs x11, h3
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    fmov d1, x9
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x10
; CHECK-FP16-SD-NEXT:    mov v1.d[1], x11
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v4f16_v4i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v4f16_v4i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <4 x half> %a to <4 x i64>
  ret <4 x i64> %c
}

define <4 x i64> @fptou_v4f16_v4i64(<4 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f16_v4i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    mov h1, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h2, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h3, v0.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s2, h2
; CHECK-NOFP16-SD-NEXT:    fcvt s3, h3
; CHECK-NOFP16-SD-NEXT:    fcvtzu x8, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzu x9, s1
; CHECK-NOFP16-SD-NEXT:    fcvtzu x10, s2
; CHECK-NOFP16-SD-NEXT:    fcvtzu x11, s3
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    fmov d1, x9
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x10
; CHECK-NOFP16-SD-NEXT:    mov v1.d[1], x11
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f16_v4i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    mov h1, v0.h[2]
; CHECK-FP16-SD-NEXT:    mov h2, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h3, v0.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzu x8, h0
; CHECK-FP16-SD-NEXT:    fcvtzu x9, h1
; CHECK-FP16-SD-NEXT:    fcvtzu x10, h2
; CHECK-FP16-SD-NEXT:    fcvtzu x11, h3
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    fmov d1, x9
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x10
; CHECK-FP16-SD-NEXT:    mov v1.d[1], x11
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f16_v4i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f16_v4i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl v1.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x half> %a to <4 x i64>
  ret <4 x i64> %c
}

define <8 x i64> @fptos_v8f16_v8i64(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f16_v8i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-NOFP16-SD-NEXT:    mov h4, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h3, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h7, v0.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    mov h2, v1.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h5, v1.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h6, v1.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s4, h4
; CHECK-NOFP16-SD-NEXT:    fcvt s3, h3
; CHECK-NOFP16-SD-NEXT:    fcvt s7, h7
; CHECK-NOFP16-SD-NEXT:    fcvtzs x9, s0
; CHECK-NOFP16-SD-NEXT:    fcvt s2, h2
; CHECK-NOFP16-SD-NEXT:    fcvt s5, h5
; CHECK-NOFP16-SD-NEXT:    fcvt s6, h6
; CHECK-NOFP16-SD-NEXT:    fcvtzs x8, s1
; CHECK-NOFP16-SD-NEXT:    fcvtzs x12, s4
; CHECK-NOFP16-SD-NEXT:    fcvtzs x11, s3
; CHECK-NOFP16-SD-NEXT:    fcvtzs x15, s7
; CHECK-NOFP16-SD-NEXT:    fmov d0, x9
; CHECK-NOFP16-SD-NEXT:    fcvtzs x10, s2
; CHECK-NOFP16-SD-NEXT:    fcvtzs x13, s5
; CHECK-NOFP16-SD-NEXT:    fcvtzs x14, s6
; CHECK-NOFP16-SD-NEXT:    fmov d2, x8
; CHECK-NOFP16-SD-NEXT:    fmov d1, x12
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x11
; CHECK-NOFP16-SD-NEXT:    fmov d3, x10
; CHECK-NOFP16-SD-NEXT:    mov v2.d[1], x13
; CHECK-NOFP16-SD-NEXT:    mov v1.d[1], x15
; CHECK-NOFP16-SD-NEXT:    mov v3.d[1], x14
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f16_v8i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-FP16-SD-NEXT:    mov h4, v0.h[2]
; CHECK-FP16-SD-NEXT:    mov h3, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h7, v0.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzs x9, h0
; CHECK-FP16-SD-NEXT:    mov h2, v1.h[2]
; CHECK-FP16-SD-NEXT:    mov h5, v1.h[1]
; CHECK-FP16-SD-NEXT:    mov h6, v1.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzs x8, h1
; CHECK-FP16-SD-NEXT:    fcvtzs x12, h4
; CHECK-FP16-SD-NEXT:    fcvtzs x11, h3
; CHECK-FP16-SD-NEXT:    fcvtzs x15, h7
; CHECK-FP16-SD-NEXT:    fmov d0, x9
; CHECK-FP16-SD-NEXT:    fcvtzs x10, h2
; CHECK-FP16-SD-NEXT:    fcvtzs x13, h5
; CHECK-FP16-SD-NEXT:    fcvtzs x14, h6
; CHECK-FP16-SD-NEXT:    fmov d2, x8
; CHECK-FP16-SD-NEXT:    fmov d1, x12
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x11
; CHECK-FP16-SD-NEXT:    fmov d3, x10
; CHECK-FP16-SD-NEXT:    mov v2.d[1], x13
; CHECK-FP16-SD-NEXT:    mov v1.d[1], x15
; CHECK-FP16-SD-NEXT:    mov v3.d[1], x14
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f16_v8i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.2d, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v4.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f16_v8i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtl v2.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v1.2d, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtl v3.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v4.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v4.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x half> %a to <8 x i64>
  ret <8 x i64> %c
}

define <8 x i64> @fptou_v8f16_v8i64(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f16_v8i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-NOFP16-SD-NEXT:    mov h4, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h3, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h7, v0.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    mov h2, v1.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h5, v1.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h6, v1.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s4, h4
; CHECK-NOFP16-SD-NEXT:    fcvt s3, h3
; CHECK-NOFP16-SD-NEXT:    fcvt s7, h7
; CHECK-NOFP16-SD-NEXT:    fcvtzu x9, s0
; CHECK-NOFP16-SD-NEXT:    fcvt s2, h2
; CHECK-NOFP16-SD-NEXT:    fcvt s5, h5
; CHECK-NOFP16-SD-NEXT:    fcvt s6, h6
; CHECK-NOFP16-SD-NEXT:    fcvtzu x8, s1
; CHECK-NOFP16-SD-NEXT:    fcvtzu x12, s4
; CHECK-NOFP16-SD-NEXT:    fcvtzu x11, s3
; CHECK-NOFP16-SD-NEXT:    fcvtzu x15, s7
; CHECK-NOFP16-SD-NEXT:    fmov d0, x9
; CHECK-NOFP16-SD-NEXT:    fcvtzu x10, s2
; CHECK-NOFP16-SD-NEXT:    fcvtzu x13, s5
; CHECK-NOFP16-SD-NEXT:    fcvtzu x14, s6
; CHECK-NOFP16-SD-NEXT:    fmov d2, x8
; CHECK-NOFP16-SD-NEXT:    fmov d1, x12
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x11
; CHECK-NOFP16-SD-NEXT:    fmov d3, x10
; CHECK-NOFP16-SD-NEXT:    mov v2.d[1], x13
; CHECK-NOFP16-SD-NEXT:    mov v1.d[1], x15
; CHECK-NOFP16-SD-NEXT:    mov v3.d[1], x14
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f16_v8i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
; CHECK-FP16-SD-NEXT:    mov h4, v0.h[2]
; CHECK-FP16-SD-NEXT:    mov h3, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h7, v0.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzu x9, h0
; CHECK-FP16-SD-NEXT:    mov h2, v1.h[2]
; CHECK-FP16-SD-NEXT:    mov h5, v1.h[1]
; CHECK-FP16-SD-NEXT:    mov h6, v1.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzu x8, h1
; CHECK-FP16-SD-NEXT:    fcvtzu x12, h4
; CHECK-FP16-SD-NEXT:    fcvtzu x11, h3
; CHECK-FP16-SD-NEXT:    fcvtzu x15, h7
; CHECK-FP16-SD-NEXT:    fmov d0, x9
; CHECK-FP16-SD-NEXT:    fcvtzu x10, h2
; CHECK-FP16-SD-NEXT:    fcvtzu x13, h5
; CHECK-FP16-SD-NEXT:    fcvtzu x14, h6
; CHECK-FP16-SD-NEXT:    fmov d2, x8
; CHECK-FP16-SD-NEXT:    fmov d1, x12
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x11
; CHECK-FP16-SD-NEXT:    fmov d3, x10
; CHECK-FP16-SD-NEXT:    mov v2.d[1], x13
; CHECK-FP16-SD-NEXT:    mov v1.d[1], x15
; CHECK-FP16-SD-NEXT:    mov v3.d[1], x14
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f16_v8i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.2d, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v4.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v3.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f16_v8i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtl v2.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v1.2d, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtl v3.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v4.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v1.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v3.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v4.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x half> %a to <8 x i64>
  ret <8 x i64> %c
}

define <16 x i64> @fptos_v16f16_v16i64(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f16_v16i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
; CHECK-NOFP16-SD-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
; CHECK-NOFP16-SD-NEXT:    mov h4, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    fcvt s5, h0
; CHECK-NOFP16-SD-NEXT:    mov h18, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h0, v0.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s6, h2
; CHECK-NOFP16-SD-NEXT:    mov h7, v2.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h16, v2.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h17, v3.h[2]
; CHECK-NOFP16-SD-NEXT:    fcvt s19, h3
; CHECK-NOFP16-SD-NEXT:    fcvt s4, h4
; CHECK-NOFP16-SD-NEXT:    fcvtzs x8, s5
; CHECK-NOFP16-SD-NEXT:    mov h5, v1.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h2, v2.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s18, h18
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzs x9, s6
; CHECK-NOFP16-SD-NEXT:    fcvt s6, h7
; CHECK-NOFP16-SD-NEXT:    fcvt s7, h16
; CHECK-NOFP16-SD-NEXT:    mov h16, v1.h[2]
; CHECK-NOFP16-SD-NEXT:    fcvt s17, h17
; CHECK-NOFP16-SD-NEXT:    fcvtzs x10, s19
; CHECK-NOFP16-SD-NEXT:    mov h19, v3.h[1]
; CHECK-NOFP16-SD-NEXT:    fcvtzs x11, s4
; CHECK-NOFP16-SD-NEXT:    mov h4, v1.h[3]
; CHECK-NOFP16-SD-NEXT:    mov h3, v3.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s5, h5
; CHECK-NOFP16-SD-NEXT:    fcvtzs x13, s7
; CHECK-NOFP16-SD-NEXT:    fcvtzs x12, s6
; CHECK-NOFP16-SD-NEXT:    fcvtzs x15, s18
; CHECK-NOFP16-SD-NEXT:    fcvt s7, h16
; CHECK-NOFP16-SD-NEXT:    fcvtzs x14, s17
; CHECK-NOFP16-SD-NEXT:    fcvt s16, h2
; CHECK-NOFP16-SD-NEXT:    fcvt s17, h19
; CHECK-NOFP16-SD-NEXT:    fcvt s4, h4
; CHECK-NOFP16-SD-NEXT:    fmov d2, x9
; CHECK-NOFP16-SD-NEXT:    fcvt s19, h3
; CHECK-NOFP16-SD-NEXT:    fcvtzs x9, s1
; CHECK-NOFP16-SD-NEXT:    fmov d6, x10
; CHECK-NOFP16-SD-NEXT:    fmov d3, x13
; CHECK-NOFP16-SD-NEXT:    fcvtzs x13, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzs x16, s5
; CHECK-NOFP16-SD-NEXT:    fcvtzs x10, s7
; CHECK-NOFP16-SD-NEXT:    fmov d7, x14
; CHECK-NOFP16-SD-NEXT:    fcvtzs x14, s16
; CHECK-NOFP16-SD-NEXT:    fcvtzs x17, s17
; CHECK-NOFP16-SD-NEXT:    fcvtzs x0, s4
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    fcvtzs x18, s19
; CHECK-NOFP16-SD-NEXT:    fmov d1, x15
; CHECK-NOFP16-SD-NEXT:    fmov d4, x9
; CHECK-NOFP16-SD-NEXT:    mov v2.d[1], x12
; CHECK-NOFP16-SD-NEXT:    fmov d5, x10
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x11
; CHECK-NOFP16-SD-NEXT:    mov v3.d[1], x14
; CHECK-NOFP16-SD-NEXT:    mov v1.d[1], x13
; CHECK-NOFP16-SD-NEXT:    mov v4.d[1], x16
; CHECK-NOFP16-SD-NEXT:    mov v6.d[1], x17
; CHECK-NOFP16-SD-NEXT:    mov v7.d[1], x18
; CHECK-NOFP16-SD-NEXT:    mov v5.d[1], x0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f16_v16i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
; CHECK-FP16-SD-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
; CHECK-FP16-SD-NEXT:    mov h4, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h5, v0.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzs x8, h0
; CHECK-FP16-SD-NEXT:    mov h0, v0.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzs x9, h1
; CHECK-FP16-SD-NEXT:    mov h7, v1.h[1]
; CHECK-FP16-SD-NEXT:    mov h6, v2.h[2]
; CHECK-FP16-SD-NEXT:    mov h16, v3.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzs x10, h4
; CHECK-FP16-SD-NEXT:    mov h4, v1.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzs x11, h2
; CHECK-FP16-SD-NEXT:    fcvtzs x12, h5
; CHECK-FP16-SD-NEXT:    mov h5, v2.h[1]
; CHECK-FP16-SD-NEXT:    mov h17, v2.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzs x13, h3
; CHECK-FP16-SD-NEXT:    mov h18, v3.h[1]
; CHECK-FP16-SD-NEXT:    mov h1, v1.h[3]
; CHECK-FP16-SD-NEXT:    mov h19, v3.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzs x14, h6
; CHECK-FP16-SD-NEXT:    fcvtzs x15, h16
; CHECK-FP16-SD-NEXT:    fcvtzs x16, h0
; CHECK-FP16-SD-NEXT:    fcvtzs x0, h4
; CHECK-FP16-SD-NEXT:    fcvtzs x17, h7
; CHECK-FP16-SD-NEXT:    fmov d2, x11
; CHECK-FP16-SD-NEXT:    fcvtzs x11, h5
; CHECK-FP16-SD-NEXT:    fcvtzs x18, h17
; CHECK-FP16-SD-NEXT:    fmov d6, x13
; CHECK-FP16-SD-NEXT:    fcvtzs x13, h18
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    fmov d4, x9
; CHECK-FP16-SD-NEXT:    fmov d3, x14
; CHECK-FP16-SD-NEXT:    fmov d7, x15
; CHECK-FP16-SD-NEXT:    fcvtzs x14, h19
; CHECK-FP16-SD-NEXT:    fcvtzs x15, h1
; CHECK-FP16-SD-NEXT:    fmov d1, x12
; CHECK-FP16-SD-NEXT:    fmov d5, x0
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x10
; CHECK-FP16-SD-NEXT:    mov v4.d[1], x17
; CHECK-FP16-SD-NEXT:    mov v2.d[1], x11
; CHECK-FP16-SD-NEXT:    mov v3.d[1], x18
; CHECK-FP16-SD-NEXT:    mov v6.d[1], x13
; CHECK-FP16-SD-NEXT:    mov v1.d[1], x16
; CHECK-FP16-SD-NEXT:    mov v7.d[1], x14
; CHECK-FP16-SD-NEXT:    mov v5.d[1], x15
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f16_v16i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.2d, v2.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v5.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v6.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v7.2d, v3.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v16.2d, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v17.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v18.2d, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v4.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v5.2d, v16.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v6.2d, v17.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzs v7.2d, v18.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f16_v16i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-FP16-GI-NEXT:    fcvtl v4.2d, v2.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtl v5.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v6.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtl v7.2d, v3.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v16.2d, v3.4s
; CHECK-FP16-GI-NEXT:    fcvtl v17.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v18.2d, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v2.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v3.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v4.2d, v7.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v5.2d, v16.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v6.2d, v17.2d
; CHECK-FP16-GI-NEXT:    fcvtzs v7.2d, v18.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x half> %a to <16 x i64>
  ret <16 x i64> %c
}

define <16 x i64> @fptou_v16f16_v16i64(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f16_v16i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
; CHECK-NOFP16-SD-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
; CHECK-NOFP16-SD-NEXT:    mov h4, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    fcvt s5, h0
; CHECK-NOFP16-SD-NEXT:    mov h18, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h0, v0.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s6, h2
; CHECK-NOFP16-SD-NEXT:    mov h7, v2.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h16, v2.h[2]
; CHECK-NOFP16-SD-NEXT:    mov h17, v3.h[2]
; CHECK-NOFP16-SD-NEXT:    fcvt s19, h3
; CHECK-NOFP16-SD-NEXT:    fcvt s4, h4
; CHECK-NOFP16-SD-NEXT:    fcvtzu x8, s5
; CHECK-NOFP16-SD-NEXT:    mov h5, v1.h[1]
; CHECK-NOFP16-SD-NEXT:    mov h2, v2.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s18, h18
; CHECK-NOFP16-SD-NEXT:    fcvt s0, h0
; CHECK-NOFP16-SD-NEXT:    fcvtzu x9, s6
; CHECK-NOFP16-SD-NEXT:    fcvt s6, h7
; CHECK-NOFP16-SD-NEXT:    fcvt s7, h16
; CHECK-NOFP16-SD-NEXT:    mov h16, v1.h[2]
; CHECK-NOFP16-SD-NEXT:    fcvt s17, h17
; CHECK-NOFP16-SD-NEXT:    fcvtzu x10, s19
; CHECK-NOFP16-SD-NEXT:    mov h19, v3.h[1]
; CHECK-NOFP16-SD-NEXT:    fcvtzu x11, s4
; CHECK-NOFP16-SD-NEXT:    mov h4, v1.h[3]
; CHECK-NOFP16-SD-NEXT:    mov h3, v3.h[3]
; CHECK-NOFP16-SD-NEXT:    fcvt s1, h1
; CHECK-NOFP16-SD-NEXT:    fcvt s5, h5
; CHECK-NOFP16-SD-NEXT:    fcvtzu x13, s7
; CHECK-NOFP16-SD-NEXT:    fcvtzu x12, s6
; CHECK-NOFP16-SD-NEXT:    fcvtzu x15, s18
; CHECK-NOFP16-SD-NEXT:    fcvt s7, h16
; CHECK-NOFP16-SD-NEXT:    fcvtzu x14, s17
; CHECK-NOFP16-SD-NEXT:    fcvt s16, h2
; CHECK-NOFP16-SD-NEXT:    fcvt s17, h19
; CHECK-NOFP16-SD-NEXT:    fcvt s4, h4
; CHECK-NOFP16-SD-NEXT:    fmov d2, x9
; CHECK-NOFP16-SD-NEXT:    fcvt s19, h3
; CHECK-NOFP16-SD-NEXT:    fcvtzu x9, s1
; CHECK-NOFP16-SD-NEXT:    fmov d6, x10
; CHECK-NOFP16-SD-NEXT:    fmov d3, x13
; CHECK-NOFP16-SD-NEXT:    fcvtzu x13, s0
; CHECK-NOFP16-SD-NEXT:    fcvtzu x16, s5
; CHECK-NOFP16-SD-NEXT:    fcvtzu x10, s7
; CHECK-NOFP16-SD-NEXT:    fmov d7, x14
; CHECK-NOFP16-SD-NEXT:    fcvtzu x14, s16
; CHECK-NOFP16-SD-NEXT:    fcvtzu x17, s17
; CHECK-NOFP16-SD-NEXT:    fcvtzu x0, s4
; CHECK-NOFP16-SD-NEXT:    fmov d0, x8
; CHECK-NOFP16-SD-NEXT:    fcvtzu x18, s19
; CHECK-NOFP16-SD-NEXT:    fmov d1, x15
; CHECK-NOFP16-SD-NEXT:    fmov d4, x9
; CHECK-NOFP16-SD-NEXT:    mov v2.d[1], x12
; CHECK-NOFP16-SD-NEXT:    fmov d5, x10
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], x11
; CHECK-NOFP16-SD-NEXT:    mov v3.d[1], x14
; CHECK-NOFP16-SD-NEXT:    mov v1.d[1], x13
; CHECK-NOFP16-SD-NEXT:    mov v4.d[1], x16
; CHECK-NOFP16-SD-NEXT:    mov v6.d[1], x17
; CHECK-NOFP16-SD-NEXT:    mov v7.d[1], x18
; CHECK-NOFP16-SD-NEXT:    mov v5.d[1], x0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f16_v16i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
; CHECK-FP16-SD-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
; CHECK-FP16-SD-NEXT:    mov h4, v0.h[1]
; CHECK-FP16-SD-NEXT:    mov h5, v0.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzu x8, h0
; CHECK-FP16-SD-NEXT:    mov h0, v0.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzu x9, h1
; CHECK-FP16-SD-NEXT:    mov h7, v1.h[1]
; CHECK-FP16-SD-NEXT:    mov h6, v2.h[2]
; CHECK-FP16-SD-NEXT:    mov h16, v3.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzu x10, h4
; CHECK-FP16-SD-NEXT:    mov h4, v1.h[2]
; CHECK-FP16-SD-NEXT:    fcvtzu x11, h2
; CHECK-FP16-SD-NEXT:    fcvtzu x12, h5
; CHECK-FP16-SD-NEXT:    mov h5, v2.h[1]
; CHECK-FP16-SD-NEXT:    mov h17, v2.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzu x13, h3
; CHECK-FP16-SD-NEXT:    mov h18, v3.h[1]
; CHECK-FP16-SD-NEXT:    mov h1, v1.h[3]
; CHECK-FP16-SD-NEXT:    mov h19, v3.h[3]
; CHECK-FP16-SD-NEXT:    fcvtzu x14, h6
; CHECK-FP16-SD-NEXT:    fcvtzu x15, h16
; CHECK-FP16-SD-NEXT:    fcvtzu x16, h0
; CHECK-FP16-SD-NEXT:    fcvtzu x0, h4
; CHECK-FP16-SD-NEXT:    fcvtzu x17, h7
; CHECK-FP16-SD-NEXT:    fmov d2, x11
; CHECK-FP16-SD-NEXT:    fcvtzu x11, h5
; CHECK-FP16-SD-NEXT:    fcvtzu x18, h17
; CHECK-FP16-SD-NEXT:    fmov d6, x13
; CHECK-FP16-SD-NEXT:    fcvtzu x13, h18
; CHECK-FP16-SD-NEXT:    fmov d0, x8
; CHECK-FP16-SD-NEXT:    fmov d4, x9
; CHECK-FP16-SD-NEXT:    fmov d3, x14
; CHECK-FP16-SD-NEXT:    fmov d7, x15
; CHECK-FP16-SD-NEXT:    fcvtzu x14, h19
; CHECK-FP16-SD-NEXT:    fcvtzu x15, h1
; CHECK-FP16-SD-NEXT:    fmov d1, x12
; CHECK-FP16-SD-NEXT:    fmov d5, x0
; CHECK-FP16-SD-NEXT:    mov v0.d[1], x10
; CHECK-FP16-SD-NEXT:    mov v4.d[1], x17
; CHECK-FP16-SD-NEXT:    mov v2.d[1], x11
; CHECK-FP16-SD-NEXT:    mov v3.d[1], x18
; CHECK-FP16-SD-NEXT:    mov v6.d[1], x13
; CHECK-FP16-SD-NEXT:    mov v1.d[1], x16
; CHECK-FP16-SD-NEXT:    mov v7.d[1], x14
; CHECK-FP16-SD-NEXT:    mov v5.d[1], x15
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f16_v16i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.2d, v2.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.2d, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v5.2d, v0.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v6.2d, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v7.2d, v3.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v16.2d, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtl v17.2d, v1.2s
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v18.2d, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2d, v4.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.2d, v5.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.2d, v6.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v4.2d, v7.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v5.2d, v16.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v6.2d, v17.2d
; CHECK-NOFP16-GI-NEXT:    fcvtzu v7.2d, v18.2d
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f16_v16i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-FP16-GI-NEXT:    fcvtl v4.2d, v2.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.2d, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtl v5.2d, v0.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v6.2d, v0.4s
; CHECK-FP16-GI-NEXT:    fcvtl v7.2d, v3.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v16.2d, v3.4s
; CHECK-FP16-GI-NEXT:    fcvtl v17.2d, v1.2s
; CHECK-FP16-GI-NEXT:    fcvtl2 v18.2d, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2d, v4.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v1.2d, v2.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v2.2d, v5.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v3.2d, v6.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v4.2d, v7.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v5.2d, v16.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v6.2d, v17.2d
; CHECK-FP16-GI-NEXT:    fcvtzu v7.2d, v18.2d
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x half> %a to <16 x i64>
  ret <16 x i64> %c
}

define <2 x i32> @fptos_v2f16_v2i32(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f16_v2i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f16_v2i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f16_v2i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f16_v2i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x half> %a to <2 x i32>
  ret <2 x i32> %c
}

define <2 x i32> @fptou_v2f16_v2i32(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f16_v2i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f16_v2i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f16_v2i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f16_v2i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x half> %a to <2 x i32>
  ret <2 x i32> %c
}

define <3 x i32> @fptos_v3f16_v3i32(<3 x half> %a) {
; CHECK-LABEL: fptos_v3f16_v3i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <3 x half> %a to <3 x i32>
  ret <3 x i32> %c
}

define <3 x i32> @fptou_v3f16_v3i32(<3 x half> %a) {
; CHECK-LABEL: fptou_v3f16_v3i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <3 x half> %a to <3 x i32>
  ret <3 x i32> %c
}

define <4 x i32> @fptos_v4f16_v4i32(<4 x half> %a) {
; CHECK-LABEL: fptos_v4f16_v4i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptosi <4 x half> %a to <4 x i32>
  ret <4 x i32> %c
}

define <4 x i32> @fptou_v4f16_v4i32(<4 x half> %a) {
; CHECK-LABEL: fptou_v4f16_v4i32:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NEXT:    ret
entry:
  %c = fptoui <4 x half> %a to <4 x i32>
  ret <4 x i32> %c
}

define <8 x i32> @fptos_v8f16_v8i32(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f16_v8i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v8f16_v8i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f16_v8i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v8f16_v8i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v2.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x half> %a to <8 x i32>
  ret <8 x i32> %c
}

define <8 x i32> @fptou_v8f16_v8i32(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f16_v8i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v8f16_v8i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f16_v8i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v8f16_v8i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v2.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v1.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v2.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x half> %a to <8 x i32>
  ret <8 x i32> %c
}

define <16 x i32> @fptos_v16f16_v16i32(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f16_v16i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v4.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v5.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v4.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f16_v16i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-FP16-SD-NEXT:    fcvtl2 v4.4s, v1.8h
; CHECK-FP16-SD-NEXT:    fcvtl v5.4s, v1.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v2.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v1.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v3.4s, v4.4s
; CHECK-FP16-SD-NEXT:    fcvtzs v2.4s, v5.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f16_v16i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v5.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v4.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f16_v16i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtl v4.4s, v1.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v5.4s, v1.8h
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v1.4s, v3.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v2.4s, v4.4s
; CHECK-FP16-GI-NEXT:    fcvtzs v3.4s, v5.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x half> %a to <16 x i32>
  ret <16 x i32> %c
}

define <16 x i32> @fptou_v16f16_v16i32(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f16_v16i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v4.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v5.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.4s, v4.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f16_v16i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-FP16-SD-NEXT:    fcvtl2 v4.4s, v1.8h
; CHECK-FP16-SD-NEXT:    fcvtl v5.4s, v1.4h
; CHECK-FP16-SD-NEXT:    fcvtzu v0.4s, v2.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v1.4s, v3.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v3.4s, v4.4s
; CHECK-FP16-SD-NEXT:    fcvtzu v2.4s, v5.4s
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f16_v16i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v5.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v4.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f16_v16i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtl v4.4s, v1.4h
; CHECK-FP16-GI-NEXT:    fcvtl2 v5.4s, v1.8h
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4s, v2.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v1.4s, v3.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v2.4s, v4.4s
; CHECK-FP16-GI-NEXT:    fcvtzu v3.4s, v5.4s
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x half> %a to <16 x i32>
  ret <16 x i32> %c
}

define <2 x i16> @fptos_v2f16_v2i16(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f16_v2i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f16_v2i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f16_v2i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f16_v2i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-GI-NEXT:    ushll v0.4s, v0.4h, #0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x half> %a to <2 x i16>
  ret <2 x i16> %c
}

define <2 x i16> @fptou_v2f16_v2i16(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f16_v2i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f16_v2i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f16_v2i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f16_v2i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4h, v0.4h
; CHECK-FP16-GI-NEXT:    ushll v0.4s, v0.4h, #0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x half> %a to <2 x i16>
  ret <2 x i16> %c
}

define <3 x i16> @fptos_v3f16_v3i16(<3 x half> %a) {
; CHECK-NOFP16-LABEL: fptos_v3f16_v3i16:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v3f16_v3i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi <3 x half> %a to <3 x i16>
  ret <3 x i16> %c
}

define <3 x i16> @fptou_v3f16_v3i16(<3 x half> %a) {
; CHECK-NOFP16-LABEL: fptou_v3f16_v3i16:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_v3f16_v3i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu v0.4h, v0.4h
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptoui <3 x half> %a to <3 x i16>
  ret <3 x i16> %c
}

define <4 x i16> @fptos_v4f16_v4i16(<4 x half> %a) {
; CHECK-NOFP16-LABEL: fptos_v4f16_v4i16:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v4f16_v4i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi <4 x half> %a to <4 x i16>
  ret <4 x i16> %c
}

define <4 x i16> @fptou_v4f16_v4i16(<4 x half> %a) {
; CHECK-NOFP16-LABEL: fptou_v4f16_v4i16:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_v4f16_v4i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu v0.4h, v0.4h
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptoui <4 x half> %a to <4 x i16>
  ret <4 x i16> %c
}

define <8 x i16> @fptos_v8f16_v8i16(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f16_v8i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v8f16_v8i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f16_v8i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v1.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x half> %a to <8 x i16>
  ret <8 x i16> %c
}

define <8 x i16> @fptou_v8f16_v8i16(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f16_v8i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_v8f16_v8i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f16_v8i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v1.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x half> %a to <8 x i16>
  ret <8 x i16> %c
}

define <16 x i16> @fptos_v16f16_v16i16(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f16_v16i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v2.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v1.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v16f16_v16i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-NEXT:    fcvtzs v1.8h, v1.8h
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f16_v16i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v2.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x half> %a to <16 x i16>
  ret <16 x i16> %c
}

define <16 x i16> @fptou_v16f16_v16i16(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f16_v16i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v2.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v1.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_v16f16_v16i16:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-NEXT:    fcvtzu v1.8h, v1.8h
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f16_v16i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v2.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x half> %a to <16 x i16>
  ret <16 x i16> %c
}

define <2 x i8> @fptos_v2f16_v2i8(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f16_v2i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f16_v2i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f16_v2i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f16_v2i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-GI-NEXT:    ushll v0.4s, v0.4h, #0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x half> %a to <2 x i8>
  ret <2 x i8> %c
}

define <2 x i8> @fptou_v2f16_v2i8(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f16_v2i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f16_v2i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f16_v2i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.2s, v0.2s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f16_v2i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4h, v0.4h
; CHECK-FP16-GI-NEXT:    ushll v0.4s, v0.4h, #0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x half> %a to <2 x i8>
  ret <2 x i8> %c
}

define <3 x i8> @fptos_v3f16_v3i8(<3 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v3f16_v3i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-NOFP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v3f16_v3i8:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v3f16_v3i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    mov s1, v0.s[1]
; CHECK-NOFP16-GI-NEXT:    mov s2, v0.s[2]
; CHECK-NOFP16-GI-NEXT:    fmov w0, s0
; CHECK-NOFP16-GI-NEXT:    fmov w1, s1
; CHECK-NOFP16-GI-NEXT:    fmov w2, s2
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi <3 x half> %a to <3 x i8>
  ret <3 x i8> %c
}

define <3 x i8> @fptou_v3f16_v3i8(<3 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v3f16_v3i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-NOFP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v3f16_v3i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-SD-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-SD-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-SD-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v3f16_v3i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    mov s1, v0.s[1]
; CHECK-NOFP16-GI-NEXT:    mov s2, v0.s[2]
; CHECK-NOFP16-GI-NEXT:    fmov w0, s0
; CHECK-NOFP16-GI-NEXT:    fmov w1, s1
; CHECK-NOFP16-GI-NEXT:    fmov w2, s2
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v3f16_v3i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4h, v0.4h
; CHECK-FP16-GI-NEXT:    umov w0, v0.h[0]
; CHECK-FP16-GI-NEXT:    umov w1, v0.h[1]
; CHECK-FP16-GI-NEXT:    umov w2, v0.h[2]
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <3 x half> %a to <3 x i8>
  ret <3 x i8> %c
}

define <4 x i8> @fptos_v4f16_v4i8(<4 x half> %a) {
; CHECK-NOFP16-LABEL: fptos_v4f16_v4i8:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v4f16_v4i8:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-NEXT:    ret
entry:
  %c = fptosi <4 x half> %a to <4 x i8>
  ret <4 x i8> %c
}

define <4 x i8> @fptou_v4f16_v4i8(<4 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v4f16_v4i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v4f16_v4i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v0.4h, v0.4h
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v4f16_v4i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    xtn v0.4h, v0.4s
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v4f16_v4i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.4h, v0.4h
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <4 x half> %a to <4 x i8>
  ret <4 x i8> %c
}

define <8 x i8> @fptos_v8f16_v8i8(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v8f16_v8i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptos_v8f16_v8i8:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v8f16_v8i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v1.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptosi <8 x half> %a to <8 x i8>
  ret <8 x i8> %c
}

define <8 x i8> @fptou_v8f16_v8i8(<8 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v8f16_v8i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v1.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
; CHECK-NOFP16-SD-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-LABEL: fptou_v8f16_v8i8:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v8f16_v8i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v1.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v1.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-NOFP16-GI-NEXT:    ret
entry:
  %c = fptoui <8 x half> %a to <8 x i8>
  ret <8 x i8> %c
}

define <16 x i8> @fptos_v16f16_v16i8(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v16f16_v16i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v2.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v1.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v16f16_v16i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.8h, v1.8h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v16f16_v16i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v2.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v16f16_v16i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtzs v1.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <16 x half> %a to <16 x i8>
  ret <16 x i8> %c
}

define <16 x i8> @fptou_v16f16_v16i8(<16 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v16f16_v16i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v2.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v3.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v1.8h, v2.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v3.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v16f16_v16i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu v1.8h, v1.8h
; CHECK-FP16-SD-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v16f16_v16i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v2.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v3.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v2.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v3.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v16f16_v16i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtzu v1.8h, v1.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <16 x half> %a to <16 x i8>
  ret <16 x i8> %c
}

define <32 x i8> @fptos_v32f16_v32i8(<32 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v32f16_v32i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v4.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v5.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v6.4s, v3.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v3.4s, v3.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v7.4s, v2.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v2.4s, v2.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v1.8h, v4.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v5.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v3.8h, v3.8h, v6.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v7.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v32f16_v32i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzs v1.8h, v1.8h
; CHECK-FP16-SD-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-SD-NEXT:    fcvtzs v3.8h, v3.8h
; CHECK-FP16-SD-NEXT:    fcvtzs v2.8h, v2.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v32f16_v32i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v5.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v6.4s, v2.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.4s, v2.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v7.4s, v3.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v3.4s, v3.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzs v4.4s, v4.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v5.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v6.4s, v6.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v7.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzs v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v4.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v5.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.8h, v6.8h, v2.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.8h, v7.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v32f16_v32i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzs v0.8h, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtzs v1.8h, v1.8h
; CHECK-FP16-GI-NEXT:    fcvtzs v2.8h, v2.8h
; CHECK-FP16-GI-NEXT:    fcvtzs v3.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <32 x half> %a to <32 x i8>
  ret <32 x i8> %c
}

define <32 x i8> @fptou_v32f16_v32i8(<32 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v32f16_v32i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v4.4s, v1.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v1.4s, v1.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v5.4s, v0.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v0.4s, v0.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v6.4s, v3.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v3.4s, v3.4h
; CHECK-NOFP16-SD-NEXT:    fcvtl2 v7.4s, v2.8h
; CHECK-NOFP16-SD-NEXT:    fcvtl v2.4s, v2.4h
; CHECK-NOFP16-SD-NEXT:    fcvtzu v4.4s, v4.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v5.4s, v5.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v6.4s, v6.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v7.4s, v7.4s
; CHECK-NOFP16-SD-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.8h, v1.8h, v4.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.8h, v0.8h, v5.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v3.8h, v3.8h, v6.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v2.8h, v2.8h, v7.8h
; CHECK-NOFP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v32f16_v32i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    fcvtzu v1.8h, v1.8h
; CHECK-FP16-SD-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-SD-NEXT:    fcvtzu v3.8h, v3.8h
; CHECK-FP16-SD-NEXT:    fcvtzu v2.8h, v2.8h
; CHECK-FP16-SD-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v32f16_v32i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    fcvtl v4.4s, v0.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v0.4s, v0.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v5.4s, v1.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v1.4s, v1.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v6.4s, v2.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v2.4s, v2.8h
; CHECK-NOFP16-GI-NEXT:    fcvtl v7.4s, v3.4h
; CHECK-NOFP16-GI-NEXT:    fcvtl2 v3.4s, v3.8h
; CHECK-NOFP16-GI-NEXT:    fcvtzu v4.4s, v4.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v0.4s, v0.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v5.4s, v5.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v1.4s, v1.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v6.4s, v6.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v2.4s, v2.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v7.4s, v7.4s
; CHECK-NOFP16-GI-NEXT:    fcvtzu v3.4s, v3.4s
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.8h, v4.8h, v0.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.8h, v5.8h, v1.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v2.8h, v6.8h, v2.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v3.8h, v7.8h, v3.8h
; CHECK-NOFP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-NOFP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v32f16_v32i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    fcvtzu v0.8h, v0.8h
; CHECK-FP16-GI-NEXT:    fcvtzu v1.8h, v1.8h
; CHECK-FP16-GI-NEXT:    fcvtzu v2.8h, v2.8h
; CHECK-FP16-GI-NEXT:    fcvtzu v3.8h, v3.8h
; CHECK-FP16-GI-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
; CHECK-FP16-GI-NEXT:    uzp1 v1.16b, v2.16b, v3.16b
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <32 x half> %a to <32 x i8>
  ret <32 x i8> %c
}

define <2 x i128> @fptos_v2f16_v2i128(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f16_v2i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    // kill: def $h0 killed $h0 killed $q0
; CHECK-NOFP16-SD-NEXT:    bl __fixhfti
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov x19, x0
; CHECK-NOFP16-SD-NEXT:    mov x20, x1
; CHECK-NOFP16-SD-NEXT:    mov h0, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    bl __fixhfti
; CHECK-NOFP16-SD-NEXT:    mov x2, x0
; CHECK-NOFP16-SD-NEXT:    mov x3, x1
; CHECK-NOFP16-SD-NEXT:    mov x0, x19
; CHECK-NOFP16-SD-NEXT:    mov x1, x20
; CHECK-NOFP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f16_v2i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    // kill: def $h0 killed $h0 killed $q0
; CHECK-FP16-SD-NEXT:    bl __fixhfti
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    mov x19, x0
; CHECK-FP16-SD-NEXT:    mov x20, x1
; CHECK-FP16-SD-NEXT:    mov h0, v0.h[1]
; CHECK-FP16-SD-NEXT:    bl __fixhfti
; CHECK-FP16-SD-NEXT:    mov x2, x0
; CHECK-FP16-SD-NEXT:    mov x3, x1
; CHECK-FP16-SD-NEXT:    mov x0, x19
; CHECK-FP16-SD-NEXT:    mov x1, x20
; CHECK-FP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f16_v2i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    mov h1, v0.h[1]
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvt s1, h1
; CHECK-NOFP16-GI-NEXT:    fcvtzs x0, s0
; CHECK-NOFP16-GI-NEXT:    fcvtzs x2, s1
; CHECK-NOFP16-GI-NEXT:    asr x1, x0, #63
; CHECK-NOFP16-GI-NEXT:    asr x3, x2, #63
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f16_v2i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    mov h1, v0.h[1]
; CHECK-FP16-GI-NEXT:    fcvtzs x0, h0
; CHECK-FP16-GI-NEXT:    fcvtzs x2, h1
; CHECK-FP16-GI-NEXT:    asr x1, x0, #63
; CHECK-FP16-GI-NEXT:    asr x3, x2, #63
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x half> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i128> @fptou_v2f16_v2i128(<2 x half> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f16_v2i128:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    // kill: def $h0 killed $h0 killed $q0
; CHECK-NOFP16-SD-NEXT:    bl __fixunshfti
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov x19, x0
; CHECK-NOFP16-SD-NEXT:    mov x20, x1
; CHECK-NOFP16-SD-NEXT:    mov h0, v0.h[1]
; CHECK-NOFP16-SD-NEXT:    bl __fixunshfti
; CHECK-NOFP16-SD-NEXT:    mov x2, x0
; CHECK-NOFP16-SD-NEXT:    mov x3, x1
; CHECK-NOFP16-SD-NEXT:    mov x0, x19
; CHECK-NOFP16-SD-NEXT:    mov x1, x20
; CHECK-NOFP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f16_v2i128:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-SD-NEXT:    .cfi_offset w20, -16
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -32
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    // kill: def $h0 killed $h0 killed $q0
; CHECK-FP16-SD-NEXT:    bl __fixunshfti
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    mov x19, x0
; CHECK-FP16-SD-NEXT:    mov x20, x1
; CHECK-FP16-SD-NEXT:    mov h0, v0.h[1]
; CHECK-FP16-SD-NEXT:    bl __fixunshfti
; CHECK-FP16-SD-NEXT:    mov x2, x0
; CHECK-FP16-SD-NEXT:    mov x3, x1
; CHECK-FP16-SD-NEXT:    mov x0, x19
; CHECK-FP16-SD-NEXT:    mov x1, x20
; CHECK-FP16-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f16_v2i128:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NOFP16-GI-NEXT:    mov h1, v0.h[1]
; CHECK-NOFP16-GI-NEXT:    mov x1, xzr
; CHECK-NOFP16-GI-NEXT:    mov x3, xzr
; CHECK-NOFP16-GI-NEXT:    fcvt s0, h0
; CHECK-NOFP16-GI-NEXT:    fcvt s1, h1
; CHECK-NOFP16-GI-NEXT:    fcvtzu x0, s0
; CHECK-NOFP16-GI-NEXT:    fcvtzu x2, s1
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f16_v2i128:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-FP16-GI-NEXT:    mov h1, v0.h[1]
; CHECK-FP16-GI-NEXT:    fcvtzu x0, h0
; CHECK-FP16-GI-NEXT:    mov x1, xzr
; CHECK-FP16-GI-NEXT:    mov x3, xzr
; CHECK-FP16-GI-NEXT:    fcvtzu x2, h1
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x half> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i64> @fptos_v2f128_v2i64(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f128_v2i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    mov v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    bl __fixtfdi
; CHECK-NOFP16-SD-NEXT:    fmov d0, x0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixtfdi
; CHECK-NOFP16-SD-NEXT:    fmov d0, x0
; CHECK-NOFP16-SD-NEXT:    ldr q1, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f128_v2i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    mov v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    bl __fixtfdi
; CHECK-FP16-SD-NEXT:    fmov d0, x0
; CHECK-FP16-SD-NEXT:    str q0, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixtfdi
; CHECK-FP16-SD-NEXT:    fmov d0, x0
; CHECK-FP16-SD-NEXT:    ldr q1, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f128_v2i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixtfdi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov x19, x0
; CHECK-NOFP16-GI-NEXT:    bl __fixtfdi
; CHECK-NOFP16-GI-NEXT:    fmov d0, x19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], x0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f128_v2i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixtfdi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov x19, x0
; CHECK-FP16-GI-NEXT:    bl __fixtfdi
; CHECK-FP16-GI-NEXT:    fmov d0, x19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.d[1], x0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x fp128> %a to <2 x i64>
  ret <2 x i64> %c
}

define <2 x i64> @fptou_v2f128_v2i64(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f128_v2i64:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    mov v0.16b, v1.16b
; CHECK-NOFP16-SD-NEXT:    bl __fixunstfdi
; CHECK-NOFP16-SD-NEXT:    fmov d0, x0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixunstfdi
; CHECK-NOFP16-SD-NEXT:    fmov d0, x0
; CHECK-NOFP16-SD-NEXT:    ldr q1, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f128_v2i64:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    mov v0.16b, v1.16b
; CHECK-FP16-SD-NEXT:    bl __fixunstfdi
; CHECK-FP16-SD-NEXT:    fmov d0, x0
; CHECK-FP16-SD-NEXT:    str q0, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixunstfdi
; CHECK-FP16-SD-NEXT:    fmov d0, x0
; CHECK-FP16-SD-NEXT:    ldr q1, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.d[1], v1.d[0]
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f128_v2i64:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfdi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov x19, x0
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfdi
; CHECK-NOFP16-GI-NEXT:    fmov d0, x19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.d[1], x0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f128_v2i64:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixunstfdi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov x19, x0
; CHECK-FP16-GI-NEXT:    bl __fixunstfdi
; CHECK-FP16-GI-NEXT:    fmov d0, x19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.d[1], x0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x fp128> %a to <2 x i64>
  ret <2 x i64> %c
}

define <2 x i32> @fptos_v2f128_v2i32(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f128_v2i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    fmov s0, w0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f128_v2i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    fmov s0, w0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f128_v2i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixtfsi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov w19, w0
; CHECK-NOFP16-GI-NEXT:    bl __fixtfsi
; CHECK-NOFP16-GI-NEXT:    fmov s0, w19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f128_v2i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixtfsi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov w19, w0
; CHECK-FP16-GI-NEXT:    bl __fixtfsi
; CHECK-FP16-GI-NEXT:    fmov s0, w19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x fp128> %a to <2 x i32>
  ret <2 x i32> %c
}

define <2 x i32> @fptou_v2f128_v2i32(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f128_v2i32:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-SD-NEXT:    fmov s0, w0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f128_v2i32:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    bl __fixunstfsi
; CHECK-FP16-SD-NEXT:    fmov s0, w0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixunstfsi
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f128_v2i32:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov w19, w0
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    fmov s0, w19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f128_v2i32:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov w19, w0
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    fmov s0, w19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x fp128> %a to <2 x i32>
  ret <2 x i32> %c
}

define <2 x i16> @fptos_v2f128_v2i16(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f128_v2i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    fmov s0, w0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f128_v2i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    fmov s0, w0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f128_v2i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixtfsi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov w19, w0
; CHECK-NOFP16-GI-NEXT:    bl __fixtfsi
; CHECK-NOFP16-GI-NEXT:    fmov s0, w19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f128_v2i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixtfsi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov w19, w0
; CHECK-FP16-GI-NEXT:    bl __fixtfsi
; CHECK-FP16-GI-NEXT:    fmov s0, w19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x fp128> %a to <2 x i16>
  ret <2 x i16> %c
}

define <2 x i16> @fptou_v2f128_v2i16(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f128_v2i16:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    fmov s0, w0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f128_v2i16:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    fmov s0, w0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f128_v2i16:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov w19, w0
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    fmov s0, w19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f128_v2i16:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov w19, w0
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    fmov s0, w19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x fp128> %a to <2 x i16>
  ret <2 x i16> %c
}

define <2 x i8> @fptos_v2f128_v2i8(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptos_v2f128_v2i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    fmov s0, w0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptos_v2f128_v2i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    fmov s0, w0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptos_v2f128_v2i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixtfsi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov w19, w0
; CHECK-NOFP16-GI-NEXT:    bl __fixtfsi
; CHECK-NOFP16-GI-NEXT:    fmov s0, w19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptos_v2f128_v2i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixtfsi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov w19, w0
; CHECK-FP16-GI-NEXT:    bl __fixtfsi
; CHECK-FP16-GI-NEXT:    fmov s0, w19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptosi <2 x fp128> %a to <2 x i8>
  ret <2 x i8> %c
}

define <2 x i8> @fptou_v2f128_v2i8(<2 x fp128> %a) {
; CHECK-NOFP16-SD-LABEL: fptou_v2f128_v2i8:
; CHECK-NOFP16-SD:       // %bb.0: // %entry
; CHECK-NOFP16-SD-NEXT:    sub sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-NOFP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NOFP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    fmov s0, w0
; CHECK-NOFP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    bl __fixtfsi
; CHECK-NOFP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-NOFP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-SD-NEXT:    add sp, sp, #48
; CHECK-NOFP16-SD-NEXT:    ret
;
; CHECK-FP16-SD-LABEL: fptou_v2f128_v2i8:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    sub sp, sp, #48
; CHECK-FP16-SD-NEXT:    str x30, [sp, #32] // 8-byte Spill
; CHECK-FP16-SD-NEXT:    .cfi_def_cfa_offset 48
; CHECK-FP16-SD-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-SD-NEXT:    str q1, [sp, #16] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    fmov s0, w0
; CHECK-FP16-SD-NEXT:    str q0, [sp] // 16-byte Spill
; CHECK-FP16-SD-NEXT:    ldr q0, [sp, #16] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    bl __fixtfsi
; CHECK-FP16-SD-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-SD-NEXT:    ldr x30, [sp, #32] // 8-byte Reload
; CHECK-FP16-SD-NEXT:    mov v0.s[1], w0
; CHECK-FP16-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-SD-NEXT:    add sp, sp, #48
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-GI-LABEL: fptou_v2f128_v2i8:
; CHECK-NOFP16-GI:       // %bb.0: // %entry
; CHECK-NOFP16-GI-NEXT:    sub sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NOFP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-NOFP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-NOFP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NOFP16-GI-NEXT:    mov w19, w0
; CHECK-NOFP16-GI-NEXT:    bl __fixunstfsi
; CHECK-NOFP16-GI-NEXT:    fmov s0, w19
; CHECK-NOFP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NOFP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-NOFP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NOFP16-GI-NEXT:    add sp, sp, #32
; CHECK-NOFP16-GI-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: fptou_v2f128_v2i8:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    sub sp, sp, #32
; CHECK-FP16-GI-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-FP16-GI-NEXT:    .cfi_def_cfa_offset 32
; CHECK-FP16-GI-NEXT:    .cfi_offset w19, -8
; CHECK-FP16-GI-NEXT:    .cfi_offset w30, -16
; CHECK-FP16-GI-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-FP16-GI-NEXT:    mov w19, w0
; CHECK-FP16-GI-NEXT:    bl __fixunstfsi
; CHECK-FP16-GI-NEXT:    fmov s0, w19
; CHECK-FP16-GI-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-FP16-GI-NEXT:    mov v0.s[1], w0
; CHECK-FP16-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-FP16-GI-NEXT:    add sp, sp, #32
; CHECK-FP16-GI-NEXT:    ret
entry:
  %c = fptoui <2 x fp128> %a to <2 x i8>
  ret <2 x i8> %c
}

define <2 x i128> @fptos_v2f128_v2i128(<2 x fp128> %a) {
; CHECK-LABEL: fptos_v2f128_v2i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    sub sp, sp, #48
; CHECK-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NEXT:    .cfi_offset w19, -8
; CHECK-NEXT:    .cfi_offset w20, -16
; CHECK-NEXT:    .cfi_offset w30, -32
; CHECK-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NEXT:    bl __fixtfti
; CHECK-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NEXT:    mov x19, x0
; CHECK-NEXT:    mov x20, x1
; CHECK-NEXT:    bl __fixtfti
; CHECK-NEXT:    mov x2, x0
; CHECK-NEXT:    mov x3, x1
; CHECK-NEXT:    mov x0, x19
; CHECK-NEXT:    mov x1, x20
; CHECK-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NEXT:    add sp, sp, #48
; CHECK-NEXT:    ret
entry:
  %c = fptosi <2 x fp128> %a to <2 x i128>
  ret <2 x i128> %c
}

define <2 x i128> @fptou_v2f128_v2i128(<2 x fp128> %a) {
; CHECK-LABEL: fptou_v2f128_v2i128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    sub sp, sp, #48
; CHECK-NEXT:    str x30, [sp, #16] // 8-byte Spill
; CHECK-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NEXT:    .cfi_offset w19, -8
; CHECK-NEXT:    .cfi_offset w20, -16
; CHECK-NEXT:    .cfi_offset w30, -32
; CHECK-NEXT:    str q1, [sp] // 16-byte Spill
; CHECK-NEXT:    bl __fixunstfti
; CHECK-NEXT:    ldr q0, [sp] // 16-byte Reload
; CHECK-NEXT:    mov x19, x0
; CHECK-NEXT:    mov x20, x1
; CHECK-NEXT:    bl __fixunstfti
; CHECK-NEXT:    mov x2, x0
; CHECK-NEXT:    mov x3, x1
; CHECK-NEXT:    mov x0, x19
; CHECK-NEXT:    mov x1, x20
; CHECK-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NEXT:    ldr x30, [sp, #16] // 8-byte Reload
; CHECK-NEXT:    add sp, sp, #48
; CHECK-NEXT:    ret
entry:
  %c = fptoui <2 x fp128> %a to <2 x i128>
  ret <2 x i128> %c
}