; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s

; Make sure the coalescer doesn't introduce any uses of
; vreg_1024. None are available to allocate with the register budget
; of this function.

define void @no_introduce_vreg_1024() #0 {
; CHECK-LABEL: no_introduce_vreg_1024:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; def v[0:7]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    v_mov_b32_e32 v9, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use v[0:15]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_setpc_b64 s[30:31]
  %tuple = call <8 x i32> asm sideeffect "; def $0","=v"()
  %sub0 = extractelement <8 x i32> %tuple, i32 0
  %insert = insertelement <16 x i32> poison, i32 %sub0, i32 9
  call void asm sideeffect "; use $0","v"(<16 x i32> %insert)
  ret void
}

attributes #0 = { nounwind "amdgpu-waves-per-eu"="10,10" }