; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64

define void @xvavg_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavg_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavg.b $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <32 x i8>, ptr %a
  %vb = load <32 x i8>, ptr %b
  %add = add <32 x i8> %va, %vb
  %shr = ashr <32 x i8> %add, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  store <32 x i8> %shr, ptr %res
  ret void
}

define void @xvavg_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavg_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavg.h $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <16 x i16>, ptr %a
  %vb = load <16 x i16>, ptr %b
  %add = add <16 x i16> %va, %vb
  %shr = ashr <16 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  store <16 x i16> %shr, ptr %res
  ret void
}

define void @xvavg_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavg_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavg.w $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <8 x i32>, ptr %a
  %vb = load <8 x i32>, ptr %b
  %add = add <8 x i32> %va, %vb
  %shr = ashr <8 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  store <8 x i32> %shr, ptr %res
  ret void
}

define void @xvavg_d(ptr %res, ptr %a, ptr %b) nounwind {
; LA32-LABEL: xvavg_d:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvld $xr0, $a1, 0
; LA32-NEXT:    xvld $xr1, $a2, 0
; LA32-NEXT:    xvadd.d $xr0, $xr0, $xr1
; LA32-NEXT:    xvsrai.d $xr0, $xr0, 1
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: xvavg_d:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvld $xr0, $a1, 0
; LA64-NEXT:    xvld $xr1, $a2, 0
; LA64-NEXT:    xvavg.d $xr0, $xr0, $xr1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %va = load <4 x i64>, ptr %a
  %vb = load <4 x i64>, ptr %b
  %add = add <4 x i64> %va, %vb
  %shr = ashr <4 x i64> %add, <i64 1, i64 1, i64 1, i64 1>
  store <4 x i64> %shr, ptr %res
  ret void
}

define void @xvavg_bu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavg_bu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavg.bu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <32 x i8>, ptr %a
  %vb = load <32 x i8>, ptr %b
  %add = add <32 x i8> %va, %vb
  %shr = lshr <32 x i8> %add, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  store <32 x i8> %shr, ptr %res
  ret void
}

define void @xvavg_hu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavg_hu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavg.hu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <16 x i16>, ptr %a
  %vb = load <16 x i16>, ptr %b
  %add = add <16 x i16> %va, %vb
  %shr = lshr <16 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  store <16 x i16> %shr, ptr %res
  ret void
}

define void @xvavg_wu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavg_wu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavg.wu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <8 x i32>, ptr %a
  %vb = load <8 x i32>, ptr %b
  %add = add <8 x i32> %va, %vb
  %shr = lshr <8 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  store <8 x i32> %shr, ptr %res
  ret void
}

define void @xvavg_du(ptr %res, ptr %a, ptr %b) nounwind {
; LA32-LABEL: xvavg_du:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvld $xr0, $a1, 0
; LA32-NEXT:    xvld $xr1, $a2, 0
; LA32-NEXT:    xvadd.d $xr0, $xr0, $xr1
; LA32-NEXT:    xvsrli.d $xr0, $xr0, 1
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: xvavg_du:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvld $xr0, $a1, 0
; LA64-NEXT:    xvld $xr1, $a2, 0
; LA64-NEXT:    xvavg.du $xr0, $xr0, $xr1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %va = load <4 x i64>, ptr %a
  %vb = load <4 x i64>, ptr %b
  %add = add <4 x i64> %va, %vb
  %shr = lshr <4 x i64> %add, <i64 1, i64 1, i64 1, i64 1>
  store <4 x i64> %shr, ptr %res
  ret void
}

define void @xvavgr_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavgr_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavgr.b $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <32 x i8>, ptr %a
  %vb = load <32 x i8>, ptr %b
  %add = add <32 x i8> %va, %vb
  %add1 = add <32 x i8> %add, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  %shr = ashr <32 x i8> %add1, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  store <32 x i8> %shr, ptr %res
  ret void
}

define void @xvavgr_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavgr_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavgr.h $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <16 x i16>, ptr %a
  %vb = load <16 x i16>, ptr %b
  %add = add <16 x i16> %va, %vb
  %add1 = add <16 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  %shr = ashr <16 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  store <16 x i16> %shr, ptr %res
  ret void
}

define void @xvavgr_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavgr_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavgr.w $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <8 x i32>, ptr %a
  %vb = load <8 x i32>, ptr %b
  %add = add <8 x i32> %va, %vb
  %add1 = add <8 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  %shr = ashr <8 x i32> %add1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  store <8 x i32> %shr, ptr %res
  ret void
}

define void @xvavgr_d(ptr %res, ptr %a, ptr %b) nounwind {
; LA32-LABEL: xvavgr_d:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvld $xr0, $a1, 0
; LA32-NEXT:    xvld $xr1, $a2, 0
; LA32-NEXT:    xvadd.d $xr0, $xr0, $xr1
; LA32-NEXT:    xvaddi.du $xr0, $xr0, 1
; LA32-NEXT:    xvsrai.d $xr0, $xr0, 1
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: xvavgr_d:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvld $xr0, $a1, 0
; LA64-NEXT:    xvld $xr1, $a2, 0
; LA64-NEXT:    xvavgr.d $xr0, $xr0, $xr1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %va = load <4 x i64>, ptr %a
  %vb = load <4 x i64>, ptr %b
  %add = add <4 x i64> %va, %vb
  %add1 = add <4 x i64> %add, <i64 1, i64 1, i64 1, i64 1>
  %shr = ashr <4 x i64> %add1, <i64 1, i64 1, i64 1, i64 1>
  store <4 x i64> %shr, ptr %res
  ret void
}

define void @xvavgr_bu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavgr_bu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavgr.bu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <32 x i8>, ptr %a
  %vb = load <32 x i8>, ptr %b
  %add = add <32 x i8> %va, %vb
  %add1 = add <32 x i8> %add, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  %shr = lshr <32 x i8> %add1, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  store <32 x i8> %shr, ptr %res
  ret void
}

define void @xvavgr_hu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavgr_hu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavgr.hu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <16 x i16>, ptr %a
  %vb = load <16 x i16>, ptr %b
  %add = add <16 x i16> %va, %vb
  %add1 = add <16 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  %shr = lshr <16 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  store <16 x i16> %shr, ptr %res
  ret void
}

define void @xvavgr_wu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: xvavgr_wu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a1, 0
; CHECK-NEXT:    xvld $xr1, $a2, 0
; CHECK-NEXT:    xvavgr.wu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %va = load <8 x i32>, ptr %a
  %vb = load <8 x i32>, ptr %b
  %add = add <8 x i32> %va, %vb
  %add1 = add <8 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  %shr = lshr <8 x i32> %add1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  store <8 x i32> %shr, ptr %res
  ret void
}

define void @xvavgr_du(ptr %res, ptr %a, ptr %b) nounwind {
; LA32-LABEL: xvavgr_du:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvld $xr0, $a1, 0
; LA32-NEXT:    xvld $xr1, $a2, 0
; LA32-NEXT:    xvadd.d $xr0, $xr0, $xr1
; LA32-NEXT:    xvaddi.du $xr0, $xr0, 1
; LA32-NEXT:    xvsrli.d $xr0, $xr0, 1
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: xvavgr_du:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvld $xr0, $a1, 0
; LA64-NEXT:    xvld $xr1, $a2, 0
; LA64-NEXT:    xvavgr.du $xr0, $xr0, $xr1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %va = load <4 x i64>, ptr %a
  %vb = load <4 x i64>, ptr %b
  %add = add <4 x i64> %va, %vb
  %add1 = add <4 x i64> %add, <i64 1, i64 1, i64 1, i64 1>
  %shr = lshr <4 x i64> %add1, <i64 1, i64 1, i64 1, i64 1>
  store <4 x i64> %shr, ptr %res
  ret void
}