; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
; RUN:   -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \
; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
; RUN:   -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \
; RUN:   -mattr=+zvfbfmin -mattr=+xsfmmbase \
; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK

define void @test_sf_vtmv_t_v_bf16m8(iXLen %tss, <vscale x 32 x bfloat> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_bf16m8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e16, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv32bf16.iXLen(iXLen %tss, <vscale x 32 x bfloat> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_f16(iXLen %tss, <vscale x 32 x half> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_f16:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e16, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv32f16.iXLen(iXLen %tss, <vscale x 32 x half> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_f32(iXLen %tss, <vscale x 16 x float> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_f32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e32, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv16f32.iXLen(iXLen %tss, <vscale x 16 x float> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_f64(iXLen %tss, <vscale x 8 x double> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_f64:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e64, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv8f64.iXLen(iXLen %tss, <vscale x 8 x double> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_i8(iXLen %tss, <vscale x 64 x i8> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_i8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e8, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv64i8.iXLen(iXLen %tss, <vscale x 64 x i8> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_i16(iXLen %tss, <vscale x 32 x i16> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_i16:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e16, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv32i16.iXLen(iXLen %tss, <vscale x 32 x i16> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_i32(iXLen %tss, <vscale x 16 x i32> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_i32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e32, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv16i32.iXLen(iXLen %tss, <vscale x 16 x i32> %src, iXLen %vl)
   ret void
}

define void @test_sf_vtmv_t_v_i64(iXLen %tss, <vscale x 8 x i64> %src, iXLen %vl) {
; CHECK-LABEL: test_sf_vtmv_t_v_i64:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sf.vsettnt zero, a1, e64, w1
; CHECK-NEXT:    sf.vtmv.t.v a0, v8
; CHECK-NEXT:    ret
 entry:
   call void @llvm.riscv.sf.vtmv.t.v.nxv8i64.iXLen(iXLen %tss, <vscale x 8 x i64> %src, iXLen %vl)
   ret void
}