; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=gvn,jump-threading -enable-pre -S | FileCheck %s --check-prefixes=CHECK,MDEP
; RUN: opt < %s -passes='gvn<memoryssa>',jump-threading -enable-pre -S | FileCheck %s --check-prefixes=CHECK,MSSA

@H = common global i32 0
@G = common global i32 0

define i32 @test(i1 %cond, i32 %v) nounwind {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: i1 [[COND:%.*]], i32 [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br i1 [[COND]], label %[[BB:.*]], label %[[MERGE:.*]]
; CHECK:       [[BB]]:
; CHECK-NEXT:    store i32 -1, ptr @G, align 4
; CHECK-NEXT:    br label %[[MERGE]]
; CHECK:       [[MERGE]]:
; CHECK-NEXT:    [[ADD_2:%.*]] = add i32 [[V]], -1
; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[ADD_2]], 0
; CHECK-NEXT:    br i1 [[CMP]], label %[[ACTION:.*]], label %[[RETURN:.*]]
; CHECK:       [[ACTION]]:
; CHECK-NEXT:    store i32 [[ADD_2]], ptr @H, align 4
; CHECK-NEXT:    br label %[[RETURN]]
; CHECK:       [[RETURN]]:
; CHECK-NEXT:    [[P:%.*]] = phi i32 [ 0, %[[MERGE]] ], [ 1, %[[ACTION]] ]
; CHECK-NEXT:    ret i32 [[P]]
;
entry:
  br i1 %cond, label %bb, label %bb1

bb:
  %add.1 = add nuw nsw i32 %v, -1
  store i32 %add.1, ptr @G, align 4
  br label %merge

bb1:
  br label %merge

merge:
  %add.2 = add i32 %v, -1
  %cmp = icmp sgt i32 %add.2, 0
  br i1 %cmp, label %action, label %return

action:
  store i32 %add.2, ptr @H, align 4
  br label %return

return:
  %p = phi i32 [0, %merge], [1, %action]
  ret i32 %p
}

;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; MDEP: {{.*}}
; MSSA: {{.*}}