; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=instcombine < %s | FileCheck %s

; (select (icmp x, 0, eq), 0, (umin x, y)) -> (umin x, y)
define i64 @umin_select(i64 %a, i64 %b) {
; CHECK-LABEL: @umin_select(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[A:%.*]], i64 [[B_FR]])
; CHECK-NEXT:    ret i64 [[UMIN]]
;
  %cond = icmp eq i64 %a, 0
  %umin = call i64 @llvm.umin.i64(i64 %a, i64 %b)
  %select = select i1 %cond, i64 0, i64 %umin
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (mul x, y)) -> (mul x, y)
define i64 @mul_select(i64 %a, i64 %b) {
; CHECK-LABEL: @mul_select(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[A:%.*]], [[B_FR]]
; CHECK-NEXT:    ret i64 [[MUL]]
;
  %cond = icmp eq i64 %a, 0
  %mul = mul i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %mul
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (mul x, y)) -> (mul x, y)
define i64 @mul_select_comm(i64 %a, i64 %b) {
; CHECK-LABEL: @mul_select_comm(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[B_FR]], [[A:%.*]]
; CHECK-NEXT:    ret i64 [[MUL]]
;
  %cond = icmp eq i64 %a, 0
  %mul = mul i64 %b, %a
  %select = select i1 %cond, i64 0, i64 %mul
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (shl x, y)) -> (shl x, y)
define i64 @shl_select(i64 %a, i64 %b) {
; CHECK-LABEL: @shl_select(
; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
; CHECK-NEXT:    [[SHL:%.*]] = shl i64 [[A]], [[B_FR:%.*]]
; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[SHL]]
; CHECK-NEXT:    ret i64 [[SELECT]]
;
  %cond = icmp eq i64 %a, 0
  %shl = shl i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %shl
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y)
define i64 @and_select(i64 %a, i64 %b) {
; CHECK-LABEL: @and_select(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[AND:%.*]] = and i64 [[A:%.*]], [[B_FR]]
; CHECK-NEXT:    ret i64 [[AND]]
;
  %cond = icmp eq i64 %a, 0
  %and = and i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %and
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y)
define i64 @and_select_comm(i64 %a, i64 %b) {
; CHECK-LABEL: @and_select_comm(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[AND:%.*]] = and i64 [[B_FR]], [[A:%.*]]
; CHECK-NEXT:    ret i64 [[AND]]
;
  %cond = icmp eq i64 %a, 0
  %and = and i64 %b, %a
  %select = select i1 %cond, i64 0, i64 %and
  ret i64 %select
}

; (select (icmp x, 0, ne), (ashr x, y), 0) -> (ashr x, y)
define i64 @ashr_select(i64 %a, i64 %b) {
; CHECK-LABEL: @ashr_select(
; CHECK-NEXT:    [[COND_NOT:%.*]] = icmp eq i64 [[A:%.*]], 0
; CHECK-NEXT:    [[ASHR:%.*]] = ashr i64 [[A]], [[B_FR:%.*]]
; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND_NOT]], i64 0, i64 [[ASHR]]
; CHECK-NEXT:    ret i64 [[SELECT]]
;
  %cond = icmp ne i64 0, %a
  %ashr = ashr i64 %a, %b
  %select = select i1 %cond, i64 %ashr, i64 0
  ret i64 %select
}

; (select (icmp x, 0, ne), (lshr x, y), 0) -> (lshr x, y)
define i64 @lshr_select(i64 %a, i64 %b) {
; CHECK-LABEL: @lshr_select(
; CHECK-NEXT:    [[COND_NOT:%.*]] = icmp eq i64 [[A:%.*]], 0
; CHECK-NEXT:    [[LSHR:%.*]] = lshr i64 [[A]], [[B_FR:%.*]]
; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND_NOT]], i64 0, i64 [[LSHR]]
; CHECK-NEXT:    ret i64 [[SELECT]]
;
  %cond = icmp ne i64 0, %a
  %lshr = lshr i64 %a, %b
  %select = select i1 %cond, i64 %lshr, i64 0
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, fshr(x, x, y)) -> fshr(x, x, y)
define i64 @fshr_select(i64 %a, i64 %b) {
; CHECK-LABEL: @fshr_select(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]])
; CHECK-NEXT:    ret i64 [[FSHR]]
;
  %cond = icmp eq i64 %a, 0
  %fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %a, i64 %b)
  %select = select i1 %cond, i64 0, i64 %fshr
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (fshl x, x, y)) -> (fshl x, x, y)
define i64 @fshl_select(i64 %a, i64 %b) {
; CHECK-LABEL: @fshl_select(
; CHECK-NEXT:    [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT:    [[FSHL:%.*]] = call i64 @llvm.fshl.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]])
; CHECK-NEXT:    ret i64 [[FSHL]]
;
  %cond = icmp eq i64 %a, 0
  %fshl = call i64 @llvm.fshl.i64(i64 %a, i64 %a, i64 %b)
  %select = select i1 %cond, i64 0, i64 %fshl
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (fshr x, z, y)) -> leave as is
define i64 @fshr_select_no_combine(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @fshr_select_no_combine(
; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
; CHECK-NEXT:    [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A]], i64 [[B:%.*]], i64 [[C:%.*]])
; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[FSHR]]
; CHECK-NEXT:    ret i64 [[SELECT]]
;
  %cond = icmp eq i64 %a, 0
  %fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %c)
  %select = select i1 %cond, i64 0, i64 %fshr
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (sdiv x, y)) -> (sdiv x, y)
define i64 @sdiv_select(i64 %a, i64 %b) {
; CHECK-LABEL: @sdiv_select(
; CHECK-NEXT:    [[DIV:%.*]] = sdiv i64 [[A:%.*]], [[B_FR:%.*]]
; CHECK-NEXT:    ret i64 [[DIV]]
;
  %cond = icmp eq i64 %a, 0
  %div = sdiv i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %div
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (udiv x, y)) -> (udiv x, y)
define i64 @udiv_select(i64 %a, i64 %b) {
; CHECK-LABEL: @udiv_select(
; CHECK-NEXT:    [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B_FR:%.*]]
; CHECK-NEXT:    ret i64 [[DIV]]
;
  %cond = icmp eq i64 %a, 0
  %div = udiv i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %div
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (srem x, y)) -> (srem x, y)
define i64 @srem_select(i64 %a, i64 %b) {
; CHECK-LABEL: @srem_select(
; CHECK-NEXT:    [[REM:%.*]] = srem i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT:    ret i64 [[REM]]
;
  %cond = icmp eq i64 %a, 0
  %rem = srem i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %rem
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (urem x, y)) -> (urem x, y)
define i64 @urem_select(i64 %a, i64 %b) {
; CHECK-LABEL: @urem_select(
; CHECK-NEXT:    [[REM:%.*]] = urem i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT:    ret i64 [[REM]]
;
  %cond = icmp eq i64 %a, 0
  %rem = urem i64 %a, %b
  %select = select i1 %cond, i64 0, i64 %rem
  ret i64 %select
}

; (select (icmp x, 0, eq), 0, (icmp x, 0, slt)) -> (icmp x, 0, slt)
define i1 @icmp_slt_select(i64 %a) {
; CHECK-LABEL: @icmp_slt_select(
; CHECK-NEXT:    [[ICMP:%.*]] = icmp slt i64 [[A:%.*]], 0
; CHECK-NEXT:    ret i1 [[ICMP]]
;
  %cond = icmp eq i64 %a, 0
  %icmp = icmp slt i64 %a, 0
  %select = select i1 %cond, i1 0, i1 %icmp
  ret i1 %select
}

; (select (icmp x, 0, eq), 0, (sub 0, x)) -> (sub 0, x)
define i64 @sub_select(i64 %a) {
; CHECK-LABEL: @sub_select(
; CHECK-NEXT:    [[SUB:%.*]] = sub i64 0, [[A:%.*]]
; CHECK-NEXT:    ret i64 [[SUB]]
;
  %cond = icmp eq i64 %a, 0
  %sub = sub i64 0, %a
  %select = select i1 %cond, i64 0, i64 %sub
  ret i64 %select
}