# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py # RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p470 -iterations=1 < %s | FileCheck %s vsetvli zero, zero, e8, mf8, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf4, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf2, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m1, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m2, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m4, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m8, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e16, mf4, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, mf2, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m1, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m2, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m4, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m8, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e32, mf2, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m1, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m2, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m4, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m8, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e64, m1, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e64, m2, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e64, m4, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e64, m8, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e8, mf8, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf4, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf2, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m1, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m2, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m4, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m8, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e16, mf4, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, mf2, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m1, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m2, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m4, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m8, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e32, mf2, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m1, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m2, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m4, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m8, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e64, m1, ta, ma vsse64.v v8, (a0), t0 vsetvli zero, zero, e64, m2, ta, ma vsse64.v v8, (a0), t0 vsetvli zero, zero, e64, m4, ta, ma vsse64.v v8, (a0), t0 vsetvli zero, zero, e64, m8, ta, ma vsse64.v v8, (a0), t0 # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 88 # CHECK-NEXT: Total Cycles: 954 # CHECK-NEXT: Total uOps: 88 # CHECK: Dispatch Width: 3 # CHECK-NEXT: uOps Per Cycle: 0.09 # CHECK-NEXT: IPC: 0.09 # CHECK-NEXT: Block RThroughput: 472.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps # CHECK-NEXT: [2]: Latency # CHECK-NEXT: [3]: RThroughput # CHECK-NEXT: [4]: MayLoad # CHECK-NEXT: [5]: MayStore # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, ta, ma # CHECK-NEXT: 1 13 2.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, ta, ma # CHECK-NEXT: 1 18 4.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, ta, ma # CHECK-NEXT: 1 22 8.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, ta, ma # CHECK-NEXT: 1 30 16.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, ta, ma # CHECK-NEXT: 1 30 32.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, ta, ma # CHECK-NEXT: 1 62 64.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, ta, ma # CHECK-NEXT: 1 126 128.00 * vlse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, ta, ma # CHECK-NEXT: 1 13 2.00 * vlse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, ta, ma # CHECK-NEXT: 1 18 4.00 * vlse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, ta, ma # CHECK-NEXT: 1 22 8.00 * vlse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, ta, ma # CHECK-NEXT: 1 30 16.00 * vlse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, ta, ma # CHECK-NEXT: 1 30 32.00 * vlse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, ta, ma # CHECK-NEXT: 1 62 64.00 * vlse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, ta, ma # CHECK-NEXT: 1 13 2.00 * vlse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, ta, ma # CHECK-NEXT: 1 18 4.00 * vlse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, ta, ma # CHECK-NEXT: 1 22 8.00 * vlse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, ta, ma # CHECK-NEXT: 1 30 16.00 * vlse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, ta, ma # CHECK-NEXT: 1 30 32.00 * vlse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, ta, ma # CHECK-NEXT: 1 13 2.00 * vlse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, ta, ma # CHECK-NEXT: 1 18 4.00 * vlse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, ta, ma # CHECK-NEXT: 1 22 8.00 * vlse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, ta, ma # CHECK-NEXT: 1 30 16.00 * vlse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, ta, ma # CHECK-NEXT: 1 13 2.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, ta, ma # CHECK-NEXT: 1 18 4.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, ta, ma # CHECK-NEXT: 1 22 8.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, ta, ma # CHECK-NEXT: 1 30 16.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, ta, ma # CHECK-NEXT: 1 30 32.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, ta, ma # CHECK-NEXT: 1 62 64.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, ta, ma # CHECK-NEXT: 1 126 128.00 * vsse8.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, ta, ma # CHECK-NEXT: 1 13 2.00 * vsse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, ta, ma # CHECK-NEXT: 1 18 4.00 * vsse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, ta, ma # CHECK-NEXT: 1 22 8.00 * vsse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, ta, ma # CHECK-NEXT: 1 30 16.00 * vsse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, ta, ma # CHECK-NEXT: 1 30 32.00 * vsse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, ta, ma # CHECK-NEXT: 1 62 64.00 * vsse16.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, ta, ma # CHECK-NEXT: 1 13 2.00 * vsse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, ta, ma # CHECK-NEXT: 1 18 4.00 * vsse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, ta, ma # CHECK-NEXT: 1 22 8.00 * vsse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, ta, ma # CHECK-NEXT: 1 30 16.00 * vsse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, ta, ma # CHECK-NEXT: 1 30 32.00 * vsse32.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, ta, ma # CHECK-NEXT: 1 13 2.00 * vsse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, ta, ma # CHECK-NEXT: 1 18 4.00 * vsse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, ta, ma # CHECK-NEXT: 1 22 8.00 * vsse64.v v8, (a0), t0 # CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, ta, ma # CHECK-NEXT: 1 30 16.00 * vsse64.v v8, (a0), t0 # CHECK: Resources: # CHECK-NEXT: [0] - SiFiveP400Div # CHECK-NEXT: [1] - SiFiveP400FEXQ0 # CHECK-NEXT: [2] - SiFiveP400FloatDiv # CHECK-NEXT: [3] - SiFiveP400IEXQ0 # CHECK-NEXT: [4] - SiFiveP400IEXQ1 # CHECK-NEXT: [5] - SiFiveP400IEXQ2 # CHECK-NEXT: [6] - SiFiveP400Load # CHECK-NEXT: [7] - SiFiveP400Store # CHECK-NEXT: [8] - SiFiveP400VDiv # CHECK-NEXT: [9] - SiFiveP400VEXQ0 # CHECK-NEXT: [10] - SiFiveP400VFloatDiv # CHECK-NEXT: [11] - SiFiveP400VLD # CHECK-NEXT: [12] - SiFiveP400VST # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] # CHECK-NEXT: - - - - 44.00 - - - - - - 472.00 472.00 # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, mf8, ta, ma # CHECK-NEXT: - - - - - - - - - - - 2.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, mf4, ta, ma # CHECK-NEXT: - - - - - - - - - - - 4.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, mf2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 8.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - 16.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 32.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - 64.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - 128.00 - vlse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, mf4, ta, ma # CHECK-NEXT: - - - - - - - - - - - 2.00 - vlse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, mf2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 4.00 - vlse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - 8.00 - vlse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 16.00 - vlse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - 32.00 - vlse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - 64.00 - vlse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, mf2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 2.00 - vlse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - 4.00 - vlse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 8.00 - vlse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - 16.00 - vlse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - 32.00 - vlse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - 2.00 - vlse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - 4.00 - vlse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - 8.00 - vlse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - 16.00 - vlse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, mf8, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 2.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, mf4, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 4.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, mf2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 8.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 16.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 32.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 64.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e8, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 128.00 vsse8.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, mf4, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 2.00 vsse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, mf2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 4.00 vsse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 8.00 vsse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 16.00 vsse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 32.00 vsse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e16, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 64.00 vsse16.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, mf2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 2.00 vsse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 4.00 vsse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 8.00 vsse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 16.00 vsse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 32.00 vsse32.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m1, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 2.00 vsse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m2, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 4.00 vsse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m4, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 8.00 vsse64.v v8, (a0), t0 # CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e64, m8, ta, ma # CHECK-NEXT: - - - - - - - - - - - - 16.00 vsse64.v v8, (a0), t0