# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py # RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s vsetvli zero, zero, e8, mf8, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf4, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf2, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m1, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m2, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m4, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e8, m8, ta, ma vlse8.v v8, (a0), t0 vsetvli zero, zero, e16, mf4, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, mf2, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m1, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m2, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m4, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e16, m8, ta, ma vlse16.v v8, (a0), t0 vsetvli zero, zero, e32, mf2, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m1, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m2, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m4, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e32, m8, ta, ma vlse32.v v8, (a0), t0 vsetvli zero, zero, e64, m1, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e64, m2, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e64, m4, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e64, m8, ta, ma vlse64.v v8, (a0), t0 vsetvli zero, zero, e8, mf8, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf4, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, mf2, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m1, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m2, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m4, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e8, m8, ta, ma vsse8.v v8, (a0), t0 vsetvli zero, zero, e16, mf4, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, mf2, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m1, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m2, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m4, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e16, m8, ta, ma vsse16.v v8, (a0), t0 vsetvli zero, zero, e32, mf2, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m1, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m2, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m4, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e32, m8, ta, ma vsse32.v v8, (a0), t0 vsetvli zero, zero, e64, m1, ta, ma vsse64.v v8, (a0), t0 vsetvli zero, zero, e64, m2, ta, ma vsse64.v v8, (a0), t0 vsetvli zero, zero, e64, m4, ta, ma vsse64.v v8, (a0), t0 vsetvli zero, zero, e64, m8, ta, ma vsse64.v v8, (a0), t0 # CHECK: Resources: # CHECK-NEXT: [0] - SMX60_FP:1 # CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB # CHECK-NEXT: [2] - SMX60_IEUA:1 # CHECK-NEXT: [3] - SMX60_IEUB:1 # CHECK-NEXT: [4] - SMX60_LS:2 # CHECK-NEXT: [5] - SMX60_VFP:1 # CHECK-NEXT: [6] - SMX60_VIEU:1 # CHECK-NEXT: [7] - SMX60_VLS:1 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps # CHECK-NEXT: [2]: Latency # CHECK-NEXT: [3]: RThroughput # CHECK-NEXT: [4]: MayLoad # CHECK-NEXT: [5]: MayStore # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK-NEXT: [7]: Bypass Latency # CHECK-NEXT: [8]: Resources ( | [] | [,