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1What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address2Date: April 20173Contact: Jeremy Kerr <jk@ozlabs.org>4Description: Configures which IO port the host side of the UART5 will appear on the host <-> BMC LPC bus.6Users: OpenBMC. Proposed changes should be mailed to7 openbmc@lists.ozlabs.org8 9What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq10Date: April 201711Contact: Jeremy Kerr <jk@ozlabs.org>12Description: Configures which interrupt number the host side of13 the UART will appear on the host <-> BMC LPC bus.14Users: OpenBMC. Proposed changes should be mailed to15 openbmc@lists.ozlabs.org16 17What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity18Date: July 201919Contact: Oskar Senft <osk@google.com>20Description: Configures the polarity of the serial interrupt to the21 host via the BMC LPC bus.22 Set to 0 for active-low or 1 for active-high.23Users: OpenBMC. Proposed changes should be mailed to24 openbmc@lists.ozlabs.org25