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1What: /sys/kernel/debug/iommu/intel/iommu_regset2Date: December 20233Contact: Jingqi Liu <Jingqi.liu@intel.com>4Description:5 This file dumps all the register contents for each IOMMU device.6 7 Example in Kabylake:8 9 ::10 11 $ sudo cat /sys/kernel/debug/iommu/intel/iommu_regset12 13 IOMMU: dmar0 Register Base Address: 26be3700014 15 Name Offset Contents16 VER 0x00 0x000000000000001017 GCMD 0x18 0x000000000000000018 GSTS 0x1c 0x00000000c700000019 FSTS 0x34 0x000000000000000020 FECTL 0x38 0x000000000000000021 22 [...]23 24 IOMMU: dmar1 Register Base Address: fed9000025 26 Name Offset Contents27 VER 0x00 0x000000000000001028 GCMD 0x18 0x000000000000000029 GSTS 0x1c 0x00000000c700000030 FSTS 0x34 0x000000000000000031 FECTL 0x38 0x000000000000000032 33 [...]34 35 IOMMU: dmar2 Register Base Address: fed9100036 37 Name Offset Contents38 VER 0x00 0x000000000000001039 GCMD 0x18 0x000000000000000040 GSTS 0x1c 0x00000000c700000041 FSTS 0x34 0x000000000000000042 FECTL 0x38 0x000000000000000043 44 [...]45 46What: /sys/kernel/debug/iommu/intel/ir_translation_struct47Date: December 202348Contact: Jingqi Liu <Jingqi.liu@intel.com>49Description:50 This file dumps the table entries for Interrupt51 remapping and Interrupt posting.52 53 Example in Kabylake:54 55 ::56 57 $ sudo cat /sys/kernel/debug/iommu/intel/ir_translation_struct58 59 Remapped Interrupt supported on IOMMU: dmar060 IR table address:10090000061 62 Entry SrcID DstID Vct IRTE_high IRTE_low63 0 00:0a.0 00000080 24 0000000000040050 000000800024000d64 1 00:0a.0 00000001 ef 0000000000040050 0000000100ef000d65 66 Remapped Interrupt supported on IOMMU: dmar167 IR table address:10030000068 Entry SrcID DstID Vct IRTE_high IRTE_low69 0 00:02.0 00000002 26 0000000000040010 000000020026000d70 71 [...]72 73 ****74 75 Posted Interrupt supported on IOMMU: dmar076 IR table address:10090000077 Entry SrcID PDA_high PDA_low Vct IRTE_high IRTE_low78 79What: /sys/kernel/debug/iommu/intel/dmar_translation_struct80Date: December 202381Contact: Jingqi Liu <Jingqi.liu@intel.com>82Description:83 This file dumps Intel IOMMU DMA remapping tables, such84 as root table, context table, PASID directory and PASID85 table entries in debugfs. For legacy mode, it doesn't86 support PASID, and hence PASID field is defaulted to87 '-1' and other PASID related fields are invalid.88 89 Example in Kabylake:90 91 ::92 93 $ sudo cat /sys/kernel/debug/iommu/intel/dmar_translation_struct94 95 IOMMU dmar1: Root Table Address: 0x10302700096 B.D.F Root_entry97 00:02.0 0x0000000000000000:0x000000010303e00198 99 Context_entry100 0x0000000000000102:0x000000010303f005101 102 PASID PASID_table_entry103 -1 0x0000000000000000:0x0000000000000000:0x0000000000000000104 105 IOMMU dmar0: Root Table Address: 0x103028000106 B.D.F Root_entry107 00:0a.0 0x0000000000000000:0x00000001038a7001108 109 Context_entry110 0x0000000000000000:0x0000000103220e7d111 112 PASID PASID_table_entry113 0 0x0000000000000000:0x0000000000800002:0x00000001038a5089114 115 [...]116 117What: /sys/kernel/debug/iommu/intel/invalidation_queue118Date: December 2023119Contact: Jingqi Liu <Jingqi.liu@intel.com>120Description:121 This file exports invalidation queue internals of each122 IOMMU device.123 124 Example in Kabylake:125 126 ::127 128 $ sudo cat /sys/kernel/debug/iommu/intel/invalidation_queue129 130 Invalidation queue on IOMMU: dmar0131 Base: 0x10022e000 Head: 20 Tail: 20132 Index qw0 qw1 qw2133 0 0000000000000014 0000000000000000 0000000000000000134 1 0000000200000025 0000000100059c04 0000000000000000135 2 0000000000000014 0000000000000000 0000000000000000136 137 qw3 status138 0000000000000000 0000000000000000139 0000000000000000 0000000000000000140 0000000000000000 0000000000000000141 142 [...]143 144 Invalidation queue on IOMMU: dmar1145 Base: 0x10026e000 Head: 32 Tail: 32146 Index qw0 qw1 status147 0 0000000000000004 0000000000000000 0000000000000000148 1 0000000200000025 0000000100059804 0000000000000000149 2 0000000000000011 0000000000000000 0000000000000000150 151 [...]152 153What: /sys/kernel/debug/iommu/intel/dmar_perf_latency154Date: December 2023155Contact: Jingqi Liu <Jingqi.liu@intel.com>156Description:157 This file is used to control and show counts of158 execution time ranges for various types per DMAR.159 160 Firstly, write a value to161 /sys/kernel/debug/iommu/intel/dmar_perf_latency162 to enable sampling.163 164 The possible values are as follows:165 166 * 0 - disable sampling all latency data167 168 * 1 - enable sampling IOTLB invalidation latency data169 170 * 2 - enable sampling devTLB invalidation latency data171 172 * 3 - enable sampling intr entry cache invalidation latency data173 174 Next, read /sys/kernel/debug/iommu/intel/dmar_perf_latency gives175 a snapshot of sampling result of all enabled monitors.176 177 Examples in Kabylake:178 179 ::180 181 1) Disable sampling all latency data:182 183 $ sudo echo 0 > /sys/kernel/debug/iommu/intel/dmar_perf_latency184 185 2) Enable sampling IOTLB invalidation latency data186 187 $ sudo echo 1 > /sys/kernel/debug/iommu/intel/dmar_perf_latency188 189 $ sudo cat /sys/kernel/debug/iommu/intel/dmar_perf_latency190 191 IOMMU: dmar0 Register Base Address: 26be37000192 <0.1us 0.1us-1us 1us-10us 10us-100us 100us-1ms193 inv_iotlb 0 0 0 0 0194 195 1ms-10ms >=10ms min(us) max(us) average(us)196 inv_iotlb 0 0 0 0 0197 198 [...]199 200 IOMMU: dmar2 Register Base Address: fed91000201 <0.1us 0.1us-1us 1us-10us 10us-100us 100us-1ms202 inv_iotlb 0 0 18 0 0203 204 1ms-10ms >=10ms min(us) max(us) average(us)205 inv_iotlb 0 0 2 2 2206 207 3) Enable sampling devTLB invalidation latency data208 209 $ sudo echo 2 > /sys/kernel/debug/iommu/intel/dmar_perf_latency210 211 $ sudo cat /sys/kernel/debug/iommu/intel/dmar_perf_latency212 213 IOMMU: dmar0 Register Base Address: 26be37000214 <0.1us 0.1us-1us 1us-10us 10us-100us 100us-1ms215 inv_devtlb 0 0 0 0 0216 217 >=10ms min(us) max(us) average(us)218 inv_devtlb 0 0 0 0219 220 [...]221 222What: /sys/kernel/debug/iommu/intel/<bdf>/domain_translation_struct223Date: December 2023224Contact: Jingqi Liu <Jingqi.liu@intel.com>225Description:226 This file dumps a specified page table of Intel IOMMU227 in legacy mode or scalable mode.228 229 For a device that only supports legacy mode, dump its230 page table by the debugfs file in the debugfs device231 directory. e.g.232 /sys/kernel/debug/iommu/intel/0000:00:02.0/domain_translation_struct.233 234 For a device that supports scalable mode, dump the235 page table of specified pasid by the debugfs file in236 the debugfs pasid directory. e.g.237 /sys/kernel/debug/iommu/intel/0000:00:02.0/1/domain_translation_struct.238 239 Examples in Kabylake:240 241 ::242 243 1) Dump the page table of device "0000:00:02.0" that only supports legacy mode.244 245 $ sudo cat /sys/kernel/debug/iommu/intel/0000:00:02.0/domain_translation_struct246 247 Device 0000:00:02.0 @0x1017f8000248 IOVA_PFN PML5E PML4E249 0x000000008d800 | 0x0000000000000000 0x00000001017f9003250 0x000000008d801 | 0x0000000000000000 0x00000001017f9003251 0x000000008d802 | 0x0000000000000000 0x00000001017f9003252 253 PDPE PDE PTE254 0x00000001017fa003 0x00000001017fb003 0x000000008d800003255 0x00000001017fa003 0x00000001017fb003 0x000000008d801003256 0x00000001017fa003 0x00000001017fb003 0x000000008d802003257 258 [...]259 260 2) Dump the page table of device "0000:00:0a.0" with PASID "1" that261 supports scalable mode.262 263 $ sudo cat /sys/kernel/debug/iommu/intel/0000:00:0a.0/1/domain_translation_struct264 265 Device 0000:00:0a.0 with pasid 1 @0x10c112000266 IOVA_PFN PML5E PML4E267 0x0000000000000 | 0x0000000000000000 0x000000010df93003268 0x0000000000001 | 0x0000000000000000 0x000000010df93003269 0x0000000000002 | 0x0000000000000000 0x000000010df93003270 271 PDPE PDE PTE272 0x0000000106ae6003 0x0000000104b38003 0x0000000147c00803273 0x0000000106ae6003 0x0000000104b38003 0x0000000147c01803274 0x0000000106ae6003 0x0000000104b38003 0x0000000147c02803275 276 [...]277