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1What: /sys/class/iommu/<iommu>/intel-iommu/address2Date: June 20143KernelVersion: 3.174Contact: Alex Williamson <alex.williamson@redhat.com>5Description:6 Physical address of the VT-d DRHD for this IOMMU.7 Format: %llx. This allows association of a sysfs8 intel-iommu with a DMAR DRHD table entry.9 10What: /sys/class/iommu/<iommu>/intel-iommu/cap11Date: June 201412KernelVersion: 3.1713Contact: Alex Williamson <alex.williamson@redhat.com>14Description:15 The cached hardware capability register value16 of this DRHD unit. Format: %llx.17 18What: /sys/class/iommu/<iommu>/intel-iommu/ecap19Date: June 201420KernelVersion: 3.1721Contact: Alex Williamson <alex.williamson@redhat.com>22Description:23 The cached hardware extended capability register24 value of this DRHD unit. Format: %llx.25 26What: /sys/class/iommu/<iommu>/intel-iommu/version27Date: June 201428KernelVersion: 3.1729Contact: Alex Williamson <alex.williamson@redhat.com>30Description:31 The architecture version as reported from the32 VT-d VER_REG. Format: %d:%d, major:minor33