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1What: /sys/devices/platform/HISI04Bx:00/chipX/all_linked2What: /sys/devices/platform/HISI04Bx:00/chipX/linked_full_lane3What: /sys/devices/platform/HISI04Bx:00/chipX/crc_err_cnt4Date: November 20235KernelVersion: 6.66Contact: Huisong Li <lihuisong@huawei.com>7Description:8 The /sys/devices/platform/HISI04Bx:00/chipX/ directory9 contains read-only attributes exposing some summarization10 information of all HCCS ports under a specified chip.11 The X in 'chipX' indicates the Xth chip on platform.12 13 There are following attributes in this directory:14 15 ================= ==== =========================================16 all_linked: (RO) if all enabled ports on this chip are17 linked (bool).18 linked_full_lane: (RO) if all linked ports on this chip are full19 lane (bool).20 crc_err_cnt: (RO) total CRC err count for all ports on this21 chip.22 ================= ==== =========================================23 24What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/all_linked25What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/linked_full_lane26What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/crc_err_cnt27Date: November 202328KernelVersion: 6.629Contact: Huisong Li <lihuisong@huawei.com>30Description:31 The /sys/devices/platform/HISI04Bx:00/chipX/dieY/ directory32 contains read-only attributes exposing some summarization33 information of all HCCS ports under a specified die.34 The Y in 'dieY' indicates the hardware id of the die on chip who35 has chip id X.36 37 There are following attributes in this directory:38 39 ================= ==== =========================================40 all_linked: (RO) if all enabled ports on this die are41 linked (bool).42 linked_full_lane: (RO) if all linked ports on this die are full43 lane (bool).44 crc_err_cnt: (RO) total CRC err count for all ports on this45 die.46 ================= ==== =========================================47 48What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/type49What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mode50What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/enable51What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/cur_lane_num52What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/link_fsm53What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask54What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/crc_err_cnt55Date: November 202356KernelVersion: 6.657Contact: Huisong Li <lihuisong@huawei.com>58Description:59 The /sys/devices/platform/HISI04Bx/chipX/dieX/hccsN/ directory60 contains read-only attributes exposing information about61 a HCCS port. The N value in 'hccsN' indicates this port id.62 The X in 'chipX' indicates the ID of the chip to which the63 HCCS port belongs. For example, X ranges from to 'n - 1' if the64 chip number on platform is n.65 The Y in 'dieY' indicates the hardware id of the die to which66 the hccs port belongs.67 Note: type, lane_mode and enable are fixed attributes on running68 platform.69 70 The HCCS port have the following attributes:71 72 ============= ==== =============================================73 type: (RO) port type (string), e.g. HCCS-v1 -> H3274 lane_mode: (RO) the lane mode of this port (string), e.g. x875 enable: (RO) indicate if this port is enabled (bool).76 cur_lane_num: (RO) current lane number of this port.77 link_fsm: (RO) link finite state machine of this port.78 lane_mask: (RO) current lane mask of this port, every bit79 indicates a lane.80 crc_err_cnt: (RO) CRC err count on this port.81 ============= ==== =============================================82