98 lines · plain
1What: /sys/devices/system/machinecheck/machinecheckX/2Contact: Andi Kleen <ak@linux.intel.com>3Date: Feb, 20074Description:5 (X = CPU number)6 7 Machine checks report internal hardware error conditions8 detected by the CPU. Uncorrected errors typically cause a9 machine check (often with panic), corrected ones cause a10 machine check log entry.11 12 For more details about the x86 machine check architecture13 see the Intel and AMD architecture manuals from their14 developer websites.15 16 For more details about the architecture17 see http://one.firstfloor.org/~andi/mce.pdf18 19 Each CPU has its own directory.20 21What: /sys/devices/system/machinecheck/machinecheckX/bank<Y>22Contact: Andi Kleen <ak@linux.intel.com>23Date: Feb, 200724Description:25 (Y bank number)26 27 64bit Hex bitmask enabling/disabling specific subevents for28 bank Y.29 30 When a bit in the bitmask is zero then the respective31 subevent will not be reported.32 33 By default all events are enabled.34 35 Note that BIOS maintain another mask to disable specific events36 per bank. This is not visible here37 38What: /sys/devices/system/machinecheck/machinecheckX/check_interval39Contact: Andi Kleen <ak@linux.intel.com>40Date: Feb, 200741Description:42 The entries appear for each CPU, but they are truly shared43 between all CPUs.44 45 How often to poll for corrected machine check errors, in46 seconds (Note output is hexadecimal). Default 5 minutes.47 When the poller finds MCEs it triggers an exponential speedup48 (poll more often) on the polling interval. When the poller49 stops finding MCEs, it triggers an exponential backoff50 (poll less often) on the polling interval. The check_interval51 variable is both the initial and maximum polling interval.52 0 means no polling for corrected machine check errors53 (but some corrected errors might be still reported54 in other ways)55 56What: /sys/devices/system/machinecheck/machinecheckX/trigger57Contact: Andi Kleen <ak@linux.intel.com>58Date: Feb, 200759Description:60 The entries appear for each CPU, but they are truly shared61 between all CPUs.62 63 Program to run when a machine check event is detected.64 This is an alternative to running mcelog regularly from cron65 and allows to detect events faster.66 67What: /sys/devices/system/machinecheck/machinecheckX/monarch_timeout68Contact: Andi Kleen <ak@linux.intel.com>69Date: Feb, 200770Description:71 How long to wait for the other CPUs to machine check too on a72 exception. 0 to disable waiting for other CPUs.73 74 Unit: us75 76What: /sys/devices/system/machinecheck/machinecheckX/ignore_ce77Contact: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>78Date: Jun 200979Description:80 Disables polling and CMCI for corrected errors.81 All corrected events are not cleared and kept in bank MSRs.82 83What: /sys/devices/system/machinecheck/machinecheckX/dont_log_ce84Contact: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>85Date: Jun 200986Description:87 Disables logging for corrected errors.88 All reported corrected errors will be cleared silently.89 90 This option will be useful if you never care about corrected91 errors.92 93What: /sys/devices/system/machinecheck/machinecheckX/cmci_disabled94Contact: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>95Date: Jun 200996Description:97 Disables the CMCI feature.98