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brintos / linux-shallow public Read only

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1What:		/sys/bus/platform/devices/dfl-fme.0/ports_num2Date:		June 20183KernelVersion:  4.194Contact:	Wu Hao <hao.wu@intel.com>5Description:	Read-only. One DFL FPGA device may have more than 16		port/Accelerator Function Unit (AFU). It returns the7		number of ports on the FPGA device when read it.8 9What:		/sys/bus/platform/devices/dfl-fme.0/bitstream_id10Date:		June 201811KernelVersion:  4.1912Contact:	Wu Hao <hao.wu@intel.com>13Description:	Read-only. It returns Bitstream (static FPGA region)14		identifier number, which includes the detailed version15		and other information of this static FPGA region.16 17What:		/sys/bus/platform/devices/dfl-fme.0/bitstream_metadata18Date:		June 201819KernelVersion:  4.1920Contact:	Wu Hao <hao.wu@intel.com>21Description:	Read-only. It returns Bitstream (static FPGA region) meta22		data, which includes the synthesis date, seed and other23		information of this static FPGA region.24 25What:		/sys/bus/platform/devices/dfl-fme.0/cache_size26Date:		August 201927KernelVersion:  5.428Contact:	Wu Hao <hao.wu@intel.com>29Description:	Read-only. It returns cache size of this FPGA device.30 31What:		/sys/bus/platform/devices/dfl-fme.0/fabric_version32Date:		August 201933KernelVersion:  5.434Contact:	Wu Hao <hao.wu@intel.com>35Description:	Read-only. It returns fabric version of this FPGA device.36		Userspace applications need this information to select37		best data channels per different fabric design.38 39What:		/sys/bus/platform/devices/dfl-fme.0/socket_id40Date:		August 201941KernelVersion:  5.442Contact:	Wu Hao <hao.wu@intel.com>43Description:	Read-only. It returns socket_id to indicate which socket44		this FPGA belongs to, only valid for integrated solution.45		User only needs this information, in case standard numa node46		can't provide correct information.47 48What:		/sys/bus/platform/devices/dfl-fme.0/errors/pcie0_errors49Date:		August 201950KernelVersion:  5.451Contact:	Wu Hao <hao.wu@intel.com>52Description:	Read-Write. Read this file for errors detected on pcie0 link.53		Write this file to clear errors logged in pcie0_errors. Write54		fails with -EINVAL if input parsing fails or input error code55		doesn't match.56 57What:		/sys/bus/platform/devices/dfl-fme.0/errors/pcie1_errors58Date:		August 201959KernelVersion:  5.460Contact:	Wu Hao <hao.wu@intel.com>61Description:	Read-Write. Read this file for errors detected on pcie1 link.62		Write this file to clear errors logged in pcie1_errors. Write63		fails with -EINVAL if input parsing fails or input error code64		doesn't match.65 66What:		/sys/bus/platform/devices/dfl-fme.0/errors/nonfatal_errors67Date:		August 201968KernelVersion:  5.469Contact:	Wu Hao <hao.wu@intel.com>70Description:	Read-only. It returns non-fatal errors detected.71 72What:		/sys/bus/platform/devices/dfl-fme.0/errors/catfatal_errors73Date:		August 201974KernelVersion:  5.475Contact:	Wu Hao <hao.wu@intel.com>76Description:	Read-only. It returns catastrophic and fatal errors detected.77 78What:		/sys/bus/platform/devices/dfl-fme.0/errors/inject_errors79Date:		August 201980KernelVersion:  5.481Contact:	Wu Hao <hao.wu@intel.com>82Description:	Read-Write. Read this file to check errors injected. Write this83		file to inject errors for testing purpose. Write fails with84		-EINVAL if input parsing fails or input inject error code isn't85		supported.86 87What:		/sys/bus/platform/devices/dfl-fme.0/errors/fme_errors88Date:		August 201989KernelVersion:  5.490Contact:	Wu Hao <hao.wu@intel.com>91Description:	Read-Write. Read this file to get errors detected on FME.92		Write this file to clear errors logged in fme_errors. Write93		fails with -EINVAL if input parsing fails or input error code94		doesn't match.95 96What:		/sys/bus/platform/devices/dfl-fme.0/errors/first_error97Date:		August 201998KernelVersion:  5.499Contact:	Wu Hao <hao.wu@intel.com>100Description:	Read-only. Read this file to get the first error detected by101		hardware.102 103What:		/sys/bus/platform/devices/dfl-fme.0/errors/next_error104Date:		August 2019105KernelVersion:  5.4106Contact:	Wu Hao <hao.wu@intel.com>107Description:	Read-only. Read this file to get the second error detected by108		hardware.109 110What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/name111Date:		October 2019112KernelVersion:	5.5113Contact:	Wu Hao <hao.wu@intel.com>114Description:	Read-Only. Read this file to get the name of hwmon device, it115		supports values:116 117		=================  =========================118		'dfl_fme_thermal'  thermal hwmon device name119		'dfl_fme_power'    power hwmon device name120		=================  =========================121 122What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_input123Date:		October 2019124KernelVersion:	5.5125Contact:	Wu Hao <hao.wu@intel.com>126Description:	Read-Only. It returns FPGA device temperature in millidegrees127		Celsius.128 129What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max130Date:		October 2019131KernelVersion:	5.5132Contact:	Wu Hao <hao.wu@intel.com>133Description:	Read-Only. It returns hardware threshold1 temperature in134		millidegrees Celsius. If temperature rises at or above this135		threshold, hardware starts 50% or 90% throttling (see136		'temp1_max_policy').137 138What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit139Date:		October 2019140KernelVersion:	5.5141Contact:	Wu Hao <hao.wu@intel.com>142Description:	Read-Only. It returns hardware threshold2 temperature in143		millidegrees Celsius. If temperature rises at or above this144		threshold, hardware starts 100% throttling.145 146What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_emergency147Date:		October 2019148KernelVersion:	5.5149Contact:	Wu Hao <hao.wu@intel.com>150Description:	Read-Only. It returns hardware trip threshold temperature in151		millidegrees Celsius. If temperature rises at or above this152		threshold, a fatal event will be triggered to board management153		controller (BMC) to shutdown FPGA.154 155What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max_alarm156Date:		October 2019157KernelVersion:	5.5158Contact:	Wu Hao <hao.wu@intel.com>159Description:	Read-only. It returns 1 if temperature is currently at or above160		hardware threshold1 (see 'temp1_max'), otherwise 0.161 162What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit_alarm163Date:		October 2019164KernelVersion:	5.5165Contact:	Wu Hao <hao.wu@intel.com>166Description:	Read-only. It returns 1 if temperature is currently at or above167		hardware threshold2 (see 'temp1_crit'), otherwise 0.168 169What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max_policy170Date:		October 2019171KernelVersion:	5.5172Contact:	Wu Hao <hao.wu@intel.com>173Description:	Read-Only. Read this file to get the policy of hardware threshold1174		(see 'temp1_max'). It only supports two values (policies):175 176		==  ==========================177		 0  AP2 state (90% throttling)178	         1  AP1 state (50% throttling)179		==  ==========================180 181What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_input182Date:		October 2019183KernelVersion:	5.5184Contact:	Wu Hao <hao.wu@intel.com>185Description:	Read-Only. It returns current FPGA power consumption in uW.186 187What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_max188Date:		October 2019189KernelVersion:	5.5190Contact:	Wu Hao <hao.wu@intel.com>191Description:	Read-Write. Read this file to get current hardware power192		threshold1 in uW. If power consumption rises at or above193		this threshold, hardware starts 50% throttling.194		Write this file to set current hardware power threshold1 in uW.195		As hardware only accepts values in Watts, so input value will196		be round down per Watts (< 1 watts part will be discarded) and197		clamped within the range from 0 to 127 Watts. Write fails with198		-EINVAL if input parsing fails.199 200What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_crit201Date:		October 2019202KernelVersion:	5.5203Contact:	Wu Hao <hao.wu@intel.com>204Description:	Read-Write. Read this file to get current hardware power205		threshold2 in uW. If power consumption rises at or above206		this threshold, hardware starts 90% throttling.207		Write this file to set current hardware power threshold2 in uW.208		As hardware only accepts values in Watts, so input value will209		be round down per Watts (< 1 watts part will be discarded) and210		clamped within the range from 0 to 127 Watts. Write fails with211		-EINVAL if input parsing fails.212 213What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_max_alarm214Date:		October 2019215KernelVersion:	5.5216Contact:	Wu Hao <hao.wu@intel.com>217Description:	Read-only. It returns 1 if power consumption is currently at or218		above hardware threshold1 (see 'power1_max'), otherwise 0.219 220What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_crit_alarm221Date:		October 2019222KernelVersion:	5.5223Contact:	Wu Hao <hao.wu@intel.com>224Description:	Read-only. It returns 1 if power consumption is currently at or225		above hardware threshold2 (see 'power1_crit'), otherwise 0.226 227What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_xeon_limit228Date:		October 2019229KernelVersion:	5.5230Contact:	Wu Hao <hao.wu@intel.com>231Description:	Read-Only. It returns power limit for XEON in uW.232 233What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_fpga_limit234Date:		October 2019235KernelVersion:	5.5236Contact:	Wu Hao <hao.wu@intel.com>237Description:	Read-Only. It returns power limit for FPGA in uW.238 239What:		/sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_ltr240Date:		October 2019241KernelVersion:	5.5242Contact:	Wu Hao <hao.wu@intel.com>243Description:	Read-only. Read this file to get current Latency Tolerance244		Reporting (ltr) value. It returns 1 if all Accelerated245		Function Units (AFUs) can tolerate latency >= 40us for memory246		access or 0 if any AFU is latency sensitive (< 40us).247