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1What: /sys/devices/platform/<platform>/etr32Date: Apr 20213KernelVersion: 5.134Contact: "Tomas Winkler" <tomas.winkler@intel.com>5Description:6 The file exposes "Extended Test Mode Register 3" global7 reset bits. The bits are used during an Intel platform8 manufacturing process to indicate that consequent reset9 of the platform is a "global reset". This type of reset10 is required in order for manufacturing configurations11 to take effect.12 13 Display global reset setting bits for PMC.14 15 * bit 31 - global reset is locked16 * bit 20 - global reset is set17 18 Writing bit 20 value to the etr3 will induce19 a platform "global reset" upon consequent platform reset,20 in case the register is not locked.21 The "global reset bit" should be locked on a production22 system and the file is in read-only mode.23