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1==========================================================2Interface between kernel and boot loaders on Exynos boards3==========================================================4 5Author: Krzysztof Kozlowski6 7Date : 6 June 20158 9The document tries to describe currently used interface between Linux kernel10and boot loaders on Samsung Exynos based boards. This is not a definition11of interface but rather a description of existing state, a reference12for information purpose only.13 14In the document "boot loader" means any of following: U-boot, proprietary15SBOOT or any other firmware for ARMv7 and ARMv8 initializing the board before16executing kernel.17 18 191. Non-Secure mode20 21Address: sysram_ns_base_addr22 23============= ============================================ ==================24Offset Value Purpose25============= ============================================ ==================260x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend270x0c 0x00000bad (Magic cookie) System suspend280x1c exynos4_secondary_startup Secondary CPU boot290x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot300x20 0xfcba0d10 (Magic cookie) AFTR310x24 exynos_cpu_resume_ns AFTR320x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR330x28 0x0 or last value during resume (Exynos542x) System suspend34============= ============================================ ==================35 36 372. Secure mode38 39Address: sysram_base_addr40 41============= ============================================ ==================42Offset Value Purpose43============= ============================================ ==================440x00 exynos4_secondary_startup Secondary CPU boot450x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot464*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot470x20 exynos_cpu_resume (Exynos4210 r1.0) AFTR480x24 0xfcba0d10 (Magic cookie, Exynos4210 r1.0) AFTR49============= ============================================ ==================50 51Address: pmu_base_addr52 53============= ============================================ ==================54Offset Value Purpose55============= ============================================ ==================560x0800 exynos_cpu_resume AFTR, suspend570x0800 mcpm_entry_point (Exynos542x with MCPM) AFTR, suspend580x0804 0xfcba0d10 (Magic cookie) AFTR590x0804 0x00000bad (Magic cookie) System suspend600x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot610x0818 0xfcba0d10 (Magic cookie, Exynos4210 r1.1) AFTR620x081C exynos_cpu_resume (Exynos4210 r1.1) AFTR63============= ============================================ ==================64 653. Other (regardless of secure/non-secure mode)66 67Address: pmu_base_addr68 69============= =============================== ===============================70Offset Value Purpose71============= =============================== ===============================720x0908 Non-zero Secondary CPU boot up indicator73 on Exynos3250 and Exynos542x74============= =============================== ===============================75 76 774. Glossary78 79AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other80modules are power gated, except the TOP modules81MCPM - Multi-Cluster Power Management82