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1Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)2---------------------------------------------------------------------3 4ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommends5moving to the load-locked/store-conditional instructions LDREX and STREX.6 7ARMv7 multiprocessing extensions introduce the ability to disable these8instructions, triggering an undefined instruction exception when executed.9Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB10sequence. If a memory access fault (an abort) occurs, a segmentation fault is11signalled to the triggering process.12 13/proc/cpu/swp_emulation holds some statistics/information, including the PID of14the last process to trigger the emulation to be invocated. For example::15 16 Emulated SWP: 1217 Emulated SWPB: 018 Aborted SWP{B}: 119 Last process: 31420 21 22NOTE:23 when accessing uncached shared regions, LDREX/STREX rely on an external24 transaction monitoring block called a global monitor to maintain update25 atomicity. If your system does not implement a global monitor, this option can26 cause programs that perform SWP operations to uncached memory to deadlock, as27 the STREX operation will always fail.28