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1.. _elf_hwcaps_index:2 3================4ARM64 ELF hwcaps5================6 7This document describes the usage and semantics of the arm64 ELF hwcaps.8 9 101. Introduction11---------------12 13Some hardware or software features are only available on some CPU14implementations, and/or with certain kernel configurations, but have no15architected discovery mechanism available to userspace code at EL0. The16kernel exposes the presence of these features to userspace through a set17of flags called hwcaps, exposed in the auxiliary vector.18 19Userspace software can test for features by acquiring the AT_HWCAP or20AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant21flags are set, e.g.::22 23 bool floating_point_is_present(void)24 {25 unsigned long hwcaps = getauxval(AT_HWCAP);26 if (hwcaps & HWCAP_FP)27 return true;28 29 return false;30 }31 32Where software relies on a feature described by a hwcap, it should check33the relevant hwcap flag to verify that the feature is present before34attempting to make use of the feature.35 36Features cannot be probed reliably through other means. When a feature37is not available, attempting to use it may result in unpredictable38behaviour, and is not guaranteed to result in any reliable indication39that the feature is unavailable, such as a SIGILL.40 41 422. Interpretation of hwcaps43---------------------------44 45The majority of hwcaps are intended to indicate the presence of features46which are described by architected ID registers inaccessible to47userspace code at EL0. These hwcaps are defined in terms of ID register48fields, and should be interpreted with reference to the definition of49these fields in the ARM Architecture Reference Manual (ARM ARM).50 51Such hwcaps are described below in the form::52 53 Functionality implied by idreg.field == val.54 55Such hwcaps indicate the availability of functionality that the ARM ARM56defines as being present when idreg.field has value val, but do not57indicate that idreg.field is precisely equal to val, nor do they58indicate the absence of functionality implied by other values of59idreg.field.60 61Other hwcaps may indicate the presence of features which cannot be62described by ID registers alone. These may be described without63reference to ID registers, and may refer to other documentation.64 65 663. The hwcaps exposed in AT_HWCAP67---------------------------------68 69HWCAP_FP70 Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000.71 72HWCAP_ASIMD73 Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000.74 75HWCAP_EVTSTRM76 The generic timer is configured to generate events at a frequency of77 approximately 10KHz.78 79HWCAP_AES80 Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.81 82HWCAP_PMULL83 Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.84 85HWCAP_SHA186 Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001.87 88HWCAP_SHA289 Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0001.90 91HWCAP_CRC3292 Functionality implied by ID_AA64ISAR0_EL1.CRC32 == 0b0001.93 94HWCAP_ATOMICS95 Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0010.96 97HWCAP_FPHP98 Functionality implied by ID_AA64PFR0_EL1.FP == 0b0001.99 100HWCAP_ASIMDHP101 Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0001.102 103HWCAP_CPUID104 EL0 access to certain ID registers is available, to the extent105 described by Documentation/arch/arm64/cpu-feature-registers.rst.106 107 These ID registers may imply the availability of features.108 109HWCAP_ASIMDRDM110 Functionality implied by ID_AA64ISAR0_EL1.RDM == 0b0001.111 112HWCAP_JSCVT113 Functionality implied by ID_AA64ISAR1_EL1.JSCVT == 0b0001.114 115HWCAP_FCMA116 Functionality implied by ID_AA64ISAR1_EL1.FCMA == 0b0001.117 118HWCAP_LRCPC119 Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001.120 121HWCAP_DCPOP122 Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001.123 124HWCAP_SHA3125 Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001.126 127HWCAP_SM3128 Functionality implied by ID_AA64ISAR0_EL1.SM3 == 0b0001.129 130HWCAP_SM4131 Functionality implied by ID_AA64ISAR0_EL1.SM4 == 0b0001.132 133HWCAP_ASIMDDP134 Functionality implied by ID_AA64ISAR0_EL1.DP == 0b0001.135 136HWCAP_SHA512137 Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.138 139HWCAP_SVE140 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001.141 142HWCAP_ASIMDFHM143 Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001.144 145HWCAP_DIT146 Functionality implied by ID_AA64PFR0_EL1.DIT == 0b0001.147 148HWCAP_USCAT149 Functionality implied by ID_AA64MMFR2_EL1.AT == 0b0001.150 151HWCAP_ILRCPC152 Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.153 154HWCAP_FLAGM155 Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.156 157HWCAP_SSBS158 Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.159 160HWCAP_SB161 Functionality implied by ID_AA64ISAR1_EL1.SB == 0b0001.162 163HWCAP_PACA164 Functionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or165 ID_AA64ISAR1_EL1.API == 0b0001, as described by166 Documentation/arch/arm64/pointer-authentication.rst.167 168HWCAP_PACG169 Functionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or170 ID_AA64ISAR1_EL1.GPI == 0b0001, as described by171 Documentation/arch/arm64/pointer-authentication.rst.172 173HWCAP2_DCPODP174 Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.175 176HWCAP2_SVE2177 Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0001.178 179HWCAP2_SVEAES180 Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.181 182HWCAP2_SVEPMULL183 Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.184 185HWCAP2_SVEBITPERM186 Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.187 188HWCAP2_SVESHA3189 Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.190 191HWCAP2_SVESM4192 Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.193 194HWCAP2_FLAGM2195 Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.196 197HWCAP2_FRINT198 Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.199 200HWCAP2_SVEI8MM201 Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.202 203HWCAP2_SVEF32MM204 Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.205 206HWCAP2_SVEF64MM207 Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.208 209HWCAP2_SVEBF16210 Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.211 212HWCAP2_I8MM213 Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.214 215HWCAP2_BF16216 Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001.217 218HWCAP2_DGH219 Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001.220 221HWCAP2_RNG222 Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.223 224HWCAP2_BTI225 Functionality implied by ID_AA64PFR1_EL1.BT == 0b0001.226 227HWCAP2_MTE228 Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described229 by Documentation/arch/arm64/memory-tagging-extension.rst.230 231HWCAP2_ECV232 Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.233 234HWCAP2_AFP235 Functionality implied by ID_AA64MMFR1_EL1.AFP == 0b0001.236 237HWCAP2_RPRES238 Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.239 240HWCAP2_MTE3241 Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described242 by Documentation/arch/arm64/memory-tagging-extension.rst.243 244HWCAP2_SME245 Functionality implied by ID_AA64PFR1_EL1.SME == 0b0001, as described246 by Documentation/arch/arm64/sme.rst.247 248HWCAP2_SME_I16I64249 Functionality implied by ID_AA64SMFR0_EL1.I16I64 == 0b1111.250 251HWCAP2_SME_F64F64252 Functionality implied by ID_AA64SMFR0_EL1.F64F64 == 0b1.253 254HWCAP2_SME_I8I32255 Functionality implied by ID_AA64SMFR0_EL1.I8I32 == 0b1111.256 257HWCAP2_SME_F16F32258 Functionality implied by ID_AA64SMFR0_EL1.F16F32 == 0b1.259 260HWCAP2_SME_B16F32261 Functionality implied by ID_AA64SMFR0_EL1.B16F32 == 0b1.262 263HWCAP2_SME_F32F32264 Functionality implied by ID_AA64SMFR0_EL1.F32F32 == 0b1.265 266HWCAP2_SME_FA64267 Functionality implied by ID_AA64SMFR0_EL1.FA64 == 0b1.268 269HWCAP2_WFXT270 Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010.271 272HWCAP2_EBF16273 Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.274 275HWCAP2_SVE_EBF16276 Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010.277 278HWCAP2_CSSC279 Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001.280 281HWCAP2_RPRFM282 Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.283 284HWCAP2_SVE2P1285 Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.286 287HWCAP2_SME2288 Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0001.289 290HWCAP2_SME2P1291 Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0010.292 293HWCAP2_SMEI16I32294 Functionality implied by ID_AA64SMFR0_EL1.I16I32 == 0b0101295 296HWCAP2_SMEBI32I32297 Functionality implied by ID_AA64SMFR0_EL1.BI32I32 == 0b1298 299HWCAP2_SMEB16B16300 Functionality implied by ID_AA64SMFR0_EL1.B16B16 == 0b1301 302HWCAP2_SMEF16F16303 Functionality implied by ID_AA64SMFR0_EL1.F16F16 == 0b1304 305HWCAP2_MOPS306 Functionality implied by ID_AA64ISAR2_EL1.MOPS == 0b0001.307 308HWCAP2_HBC309 Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001.310 311HWCAP2_SVE_B16B16312 Functionality implied by ID_AA64ZFR0_EL1.B16B16 == 0b0001.313 314HWCAP2_LRCPC3315 Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0011.316 317HWCAP2_LSE128318 Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0011.319 320HWCAP2_FPMR321 Functionality implied by ID_AA64PFR2_EL1.FMR == 0b0001.322 323HWCAP2_LUT324 Functionality implied by ID_AA64ISAR2_EL1.LUT == 0b0001.325 326HWCAP2_FAMINMAX327 Functionality implied by ID_AA64ISAR3_EL1.FAMINMAX == 0b0001.328 329HWCAP2_F8CVT330 Functionality implied by ID_AA64FPFR0_EL1.F8CVT == 0b1.331 332HWCAP2_F8FMA333 Functionality implied by ID_AA64FPFR0_EL1.F8FMA == 0b1.334 335HWCAP2_F8DP4336 Functionality implied by ID_AA64FPFR0_EL1.F8DP4 == 0b1.337 338HWCAP2_F8DP2339 Functionality implied by ID_AA64FPFR0_EL1.F8DP2 == 0b1.340 341HWCAP2_F8E4M3342 Functionality implied by ID_AA64FPFR0_EL1.F8E4M3 == 0b1.343 344HWCAP2_F8E5M2345 Functionality implied by ID_AA64FPFR0_EL1.F8E5M2 == 0b1.346 347HWCAP2_SME_LUTV2348 Functionality implied by ID_AA64SMFR0_EL1.LUTv2 == 0b1.349 350HWCAP2_SME_F8F16351 Functionality implied by ID_AA64SMFR0_EL1.F8F16 == 0b1.352 353HWCAP2_SME_F8F32354 Functionality implied by ID_AA64SMFR0_EL1.F8F32 == 0b1.355 356HWCAP2_SME_SF8FMA357 Functionality implied by ID_AA64SMFR0_EL1.SF8FMA == 0b1.358 359HWCAP2_SME_SF8DP4360 Functionality implied by ID_AA64SMFR0_EL1.SF8DP4 == 0b1.361 362HWCAP2_SME_SF8DP2363 Functionality implied by ID_AA64SMFR0_EL1.SF8DP2 == 0b1.364 365HWCAP2_SME_SF8DP4366 Functionality implied by ID_AA64SMFR0_EL1.SF8DP4 == 0b1.367 368HWCAP2_POE369 Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001.370 3714. Unused AT_HWCAP bits372-----------------------373 374For interoperation with userspace, the kernel guarantees that bits 62375and 63 of AT_HWCAP will always be returned as 0.376