brintos

brintos / linux-shallow public Read only

0
0
Text · 2.8 KiB · a8d6b60 Raw
102 lines · plain
1==========================2CPU to ISA Version Mapping3==========================4 5Mapping of some CPU versions to relevant ISA versions.6 7Note Power4 and Power4+ are not supported.8 9========= ====================================================================10CPU       Architecture version11========= ====================================================================12Power10   Power ISA v3.113Power9    Power ISA v3.0B14Power8    Power ISA v2.0715e6500     Power ISA v2.06 with some exceptions16e5500     Power ISA v2.06 with some exceptions, no Altivec17Power7    Power ISA v2.0618Power6    Power ISA v2.0519PA6T      Power ISA v2.0420Cell PPU  - Power ISA v2.02 with some minor exceptions21          - Plus Altivec/VMX ~= 2.0322Power5++  Power ISA v2.04 (no VMX)23Power5+   Power ISA v2.0324Power5    - PowerPC User Instruction Set Architecture Book I v2.0225          - PowerPC Virtual Environment Architecture Book II v2.0226          - PowerPC Operating Environment Architecture Book III v2.0227PPC970    - PowerPC User Instruction Set Architecture Book I v2.0128          - PowerPC Virtual Environment Architecture Book II v2.0129          - PowerPC Operating Environment Architecture Book III v2.0130          - Plus Altivec/VMX ~= 2.0331Power4+   - PowerPC User Instruction Set Architecture Book I v2.0132          - PowerPC Virtual Environment Architecture Book II v2.0133          - PowerPC Operating Environment Architecture Book III v2.0134Power4    - PowerPC User Instruction Set Architecture Book I v2.0035          - PowerPC Virtual Environment Architecture Book II v2.0036          - PowerPC Operating Environment Architecture Book III v2.0037========= ====================================================================38 39 40Key Features41------------42 43========== ==================44CPU        VMX (aka. Altivec)45========== ==================46Power10    Yes47Power9     Yes48Power8     Yes49e6500      Yes50e5500      No51Power7     Yes52Power6     Yes53PA6T       Yes54Cell PPU   Yes55Power5++   No56Power5+    No57Power5     No58PPC970     Yes59Power4+    No60Power4     No61========== ==================62 63========== ====64CPU        VSX65========== ====66Power10    Yes67Power9     Yes68Power8     Yes69e6500      No70e5500      No71Power7     Yes72Power6     No73PA6T       No74Cell PPU   No75Power5++   No76Power5+    No77Power5     No78PPC970     No79Power4+    No80Power4     No81========== ====82 83========== ====================================84CPU        Transactional Memory85========== ====================================86Power10    No  (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture")87Power9     Yes (* see transactional_memory.txt)88Power8     Yes89e6500      No90e5500      No91Power7     No92Power6     No93PA6T       No94Cell PPU   No95Power5++   No96Power5+    No97Power5     No98PPC970     No99Power4+    No100Power4     No101========== ====================================102