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1======2Ptrace3======4 5GDB intends to support the following hardware debug features of BookE6processors:7 84 hardware breakpoints (IAC)92 hardware watchpoints (read, write and read-write) (DAC)102 value conditions for the hardware watchpoints (DVC)11 12For that, we need to extend ptrace so that GDB can query and set these13resources. Since we're extending, we're trying to create an interface14that's extendable and that covers both BookE and server processors, so15that GDB doesn't need to special-case each of them. We added the16following 3 new ptrace requests.17 181. PPC_PTRACE_GETHWDBGINFO19============================20 21Query for GDB to discover the hardware debug features. The main info to22be returned here is the minimum alignment for the hardware watchpoints.23BookE processors don't have restrictions here, but server processors have24an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid25adding special cases to GDB based on what it sees in AUXV.26 27Since we're at it, we added other useful info that the kernel can return to28GDB: this query will return the number of hardware breakpoints, hardware29watchpoints and whether it supports a range of addresses and a condition.30The query will fill the following structure provided by the requesting process::31 32 struct ppc_debug_info {33 unit32_t version;34 unit32_t num_instruction_bps;35 unit32_t num_data_bps;36 unit32_t num_condition_regs;37 unit32_t data_bp_alignment;38 unit32_t sizeof_condition; /* size of the DVC register */39 uint64_t features; /* bitmask of the individual flags */40 };41 42features will have bits indicating whether there is support for::43 44 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x145 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x246 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x447 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x848 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x1049 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 0x2050 512. PPC_PTRACE_SETHWDEBUG52 53Sets a hardware breakpoint or watchpoint, according to the provided structure::54 55 struct ppc_hw_breakpoint {56 uint32_t version;57 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x158 #define PPC_BREAKPOINT_TRIGGER_READ 0x259 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x460 uint32_t trigger_type; /* only some combinations allowed */61 #define PPC_BREAKPOINT_MODE_EXACT 0x062 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x163 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x264 #define PPC_BREAKPOINT_MODE_MASK 0x365 uint32_t addr_mode; /* address match mode */66 67 #define PPC_BREAKPOINT_CONDITION_MODE 0x368 #define PPC_BREAKPOINT_CONDITION_NONE 0x069 #define PPC_BREAKPOINT_CONDITION_AND 0x170 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1 /* different name for the same thing as above */71 #define PPC_BREAKPOINT_CONDITION_OR 0x272 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x373 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 /* byte enable bits */74 #define PPC_BREAKPOINT_CONDITION_BE(n) (1<<((n)+16))75 uint32_t condition_mode; /* break/watchpoint condition flags */76 77 uint64_t addr;78 uint64_t addr2;79 uint64_t condition_value;80 };81 82A request specifies one event, not necessarily just one register to be set.83For instance, if the request is for a watchpoint with a condition, both the84DAC and DVC registers will be set in the same request.85 86With this GDB can ask for all kinds of hardware breakpoints and watchpoints87that the BookE supports. COMEFROM breakpoints available in server processors88are not contemplated, but that is out of the scope of this work.89 90ptrace will return an integer (handle) uniquely identifying the breakpoint or91watchpoint just created. This integer will be used in the PPC_PTRACE_DELHWDEBUG92request to ask for its removal. Return -ENOSPC if the requested breakpoint93can't be allocated on the registers.94 95Some examples of using the structure to:96 97- set a breakpoint in the first breakpoint register::98 99 p.version = PPC_DEBUG_CURRENT_VERSION;100 p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE;101 p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;102 p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;103 p.addr = (uint64_t) address;104 p.addr2 = 0;105 p.condition_value = 0;106 107- set a watchpoint which triggers on reads in the second watchpoint register::108 109 p.version = PPC_DEBUG_CURRENT_VERSION;110 p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ;111 p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;112 p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;113 p.addr = (uint64_t) address;114 p.addr2 = 0;115 p.condition_value = 0;116 117- set a watchpoint which triggers only with a specific value::118 119 p.version = PPC_DEBUG_CURRENT_VERSION;120 p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ;121 p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;122 p.condition_mode = PPC_BREAKPOINT_CONDITION_AND | PPC_BREAKPOINT_CONDITION_BE_ALL;123 p.addr = (uint64_t) address;124 p.addr2 = 0;125 p.condition_value = (uint64_t) condition;126 127- set a ranged hardware breakpoint::128 129 p.version = PPC_DEBUG_CURRENT_VERSION;130 p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE;131 p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE;132 p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;133 p.addr = (uint64_t) begin_range;134 p.addr2 = (uint64_t) end_range;135 p.condition_value = 0;136 137- set a watchpoint in server processors (BookS)::138 139 p.version = 1;140 p.trigger_type = PPC_BREAKPOINT_TRIGGER_RW;141 p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE;142 or143 p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;144 145 p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;146 p.addr = (uint64_t) begin_range;147 /* For PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE addr2 needs to be specified, where148 * addr2 - addr <= 8 Bytes.149 */150 p.addr2 = (uint64_t) end_range;151 p.condition_value = 0;152 1533. PPC_PTRACE_DELHWDEBUG154 155Takes an integer which identifies an existing breakpoint or watchpoint156(i.e., the value returned from PTRACE_SETHWDEBUG), and deletes the157corresponding breakpoint or watchpoint..158