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1.. SPDX-License-Identifier: GPL-2.02 3=====================================4Asynchronous Transfers/Transforms API5=====================================6 7.. Contents8 9 1. INTRODUCTION10 11 2 GENEALOGY12 13 3 USAGE14 3.1 General format of the API15 3.2 Supported operations16 3.3 Descriptor management17 3.4 When does the operation execute?18 3.5 When does the operation complete?19 3.6 Constraints20 3.7 Example21 22 4 DMAENGINE DRIVER DEVELOPER NOTES23 4.1 Conformance points24 4.2 "My application needs exclusive control of hardware channels"25 26 5 SOURCE27 281. Introduction29===============30 31The async_tx API provides methods for describing a chain of asynchronous32bulk memory transfers/transforms with support for inter-transactional33dependencies. It is implemented as a dmaengine client that smooths over34the details of different hardware offload engine implementations. Code35that is written to the API can optimize for asynchronous operation and36the API will fit the chain of operations to the available offload37resources.38 392.Genealogy40===========41 42The API was initially designed to offload the memory copy and43xor-parity-calculations of the md-raid5 driver using the offload engines44present in the Intel(R) Xscale series of I/O processors. It also built45on the 'dmaengine' layer developed for offloading memory copies in the46network stack using Intel(R) I/OAT engines. The following design47features surfaced as a result:48 491. implicit synchronous path: users of the API do not need to know if50 the platform they are running on has offload capabilities. The51 operation will be offloaded when an engine is available and carried out52 in software otherwise.532. cross channel dependency chains: the API allows a chain of dependent54 operations to be submitted, like xor->copy->xor in the raid5 case. The55 API automatically handles cases where the transition from one operation56 to another implies a hardware channel switch.573. dmaengine extensions to support multiple clients and operation types58 beyond 'memcpy'59 603. Usage61========62 633.1 General format of the API64-----------------------------65 66::67 68 struct dma_async_tx_descriptor *69 async_<operation>(<op specific parameters>, struct async_submit_ctl *submit)70 713.2 Supported operations72------------------------73 74======== ====================================================================75memcpy memory copy between a source and a destination buffer76memset fill a destination buffer with a byte value77xor xor a series of source buffers and write the result to a78 destination buffer79xor_val xor a series of source buffers and set a flag if the80 result is zero. The implementation attempts to prevent81 writes to memory82pq generate the p+q (raid6 syndrome) from a series of source buffers83pq_val validate that a p and or q buffer are in sync with a given series of84 sources85datap (raid6_datap_recov) recover a raid6 data block and the p block86 from the given sources872data (raid6_2data_recov) recover 2 raid6 data blocks from the given88 sources89======== ====================================================================90 913.3 Descriptor management92-------------------------93 94The return value is non-NULL and points to a 'descriptor' when the operation95has been queued to execute asynchronously. Descriptors are recycled96resources, under control of the offload engine driver, to be reused as97operations complete. When an application needs to submit a chain of98operations it must guarantee that the descriptor is not automatically recycled99before the dependency is submitted. This requires that all descriptors be100acknowledged by the application before the offload engine driver is allowed to101recycle (or free) the descriptor. A descriptor can be acked by one of the102following methods:103 1041. setting the ASYNC_TX_ACK flag if no child operations are to be submitted1052. submitting an unacknowledged descriptor as a dependency to another106 async_tx call will implicitly set the acknowledged state.1073. calling async_tx_ack() on the descriptor.108 1093.4 When does the operation execute?110------------------------------------111 112Operations do not immediately issue after return from the113async_<operation> call. Offload engine drivers batch operations to114improve performance by reducing the number of mmio cycles needed to115manage the channel. Once a driver-specific threshold is met the driver116automatically issues pending operations. An application can force this117event by calling async_tx_issue_pending_all(). This operates on all118channels since the application has no knowledge of channel to operation119mapping.120 1213.5 When does the operation complete?122-------------------------------------123 124There are two methods for an application to learn about the completion125of an operation.126 1271. Call dma_wait_for_async_tx(). This call causes the CPU to spin while128 it polls for the completion of the operation. It handles dependency129 chains and issuing pending operations.1302. Specify a completion callback. The callback routine runs in tasklet131 context if the offload engine driver supports interrupts, or it is132 called in application context if the operation is carried out133 synchronously in software. The callback can be set in the call to134 async_<operation>, or when the application needs to submit a chain of135 unknown length it can use the async_trigger_callback() routine to set a136 completion interrupt/callback at the end of the chain.137 1383.6 Constraints139---------------140 1411. Calls to async_<operation> are not permitted in IRQ context. Other142 contexts are permitted provided constraint #2 is not violated.1432. Completion callback routines cannot submit new operations. This144 results in recursion in the synchronous case and spin_locks being145 acquired twice in the asynchronous case.146 1473.7 Example148-----------149 150Perform a xor->copy->xor operation where each operation depends on the151result from the previous operation::152 153 #include <linux/async_tx.h>154 155 static void callback(void *param)156 {157 complete(param);158 }159 160 #define NDISKS 2161 162 static void run_xor_copy_xor(struct page **xor_srcs,163 struct page *xor_dest,164 size_t xor_len,165 struct page *copy_src,166 struct page *copy_dest,167 size_t copy_len)168 {169 struct dma_async_tx_descriptor *tx;170 struct async_submit_ctl submit;171 addr_conv_t addr_conv[NDISKS];172 struct completion cmp;173 174 init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL,175 addr_conv);176 tx = async_xor(xor_dest, xor_srcs, 0, NDISKS, xor_len, &submit);177 178 submit.depend_tx = tx;179 tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len, &submit);180 181 init_completion(&cmp);182 init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST | ASYNC_TX_ACK, tx,183 callback, &cmp, addr_conv);184 tx = async_xor(xor_dest, xor_srcs, 0, NDISKS, xor_len, &submit);185 186 async_tx_issue_pending_all();187 188 wait_for_completion(&cmp);189 }190 191See include/linux/async_tx.h for more information on the flags. See the192ops_run_* and ops_complete_* routines in drivers/md/raid5.c for more193implementation examples.194 1954. Driver Development Notes196===========================197 1984.1 Conformance points199----------------------200 201There are a few conformance points required in dmaengine drivers to202accommodate assumptions made by applications using the async_tx API:203 2041. Completion callbacks are expected to happen in tasklet context2052. dma_async_tx_descriptor fields are never manipulated in IRQ context2063. Use async_tx_run_dependencies() in the descriptor clean up path to207 handle submission of dependent operations208 2094.2 "My application needs exclusive control of hardware channels"210-----------------------------------------------------------------211 212Primarily this requirement arises from cases where a DMA engine driver213is being used to support device-to-memory operations. A channel that is214performing these operations cannot, for many platform specific reasons,215be shared. For these cases the dma_request_channel() interface is216provided.217 218The interface is::219 220 struct dma_chan *dma_request_channel(dma_cap_mask_t mask,221 dma_filter_fn filter_fn,222 void *filter_param);223 224Where dma_filter_fn is defined as::225 226 typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);227 228When the optional 'filter_fn' parameter is set to NULL229dma_request_channel simply returns the first channel that satisfies the230capability mask. Otherwise, when the mask parameter is insufficient for231specifying the necessary channel, the filter_fn routine can be used to232disposition the available channels in the system. The filter_fn routine233is called once for each free channel in the system. Upon seeing a234suitable channel filter_fn returns DMA_ACK which flags that channel to235be the return value from dma_request_channel. A channel allocated via236this interface is exclusive to the caller, until dma_release_channel()237is called.238 239The DMA_PRIVATE capability flag is used to tag dma devices that should240not be used by the general-purpose allocator. It can be set at241initialization time if it is known that a channel will always be242private. Alternatively, it is set when dma_request_channel() finds an243unused "public" channel.244 245A couple caveats to note when implementing a driver and consumer:246 2471. Once a channel has been privately allocated it will no longer be248 considered by the general-purpose allocator even after a call to249 dma_release_channel().2502. Since capabilities are specified at the device level a dma_device251 with multiple channels will either have all channels public, or all252 channels private.253 2545. Source255---------256 257include/linux/dmaengine.h:258 core header file for DMA drivers and api users259drivers/dma/dmaengine.c:260 offload engine channel management routines261drivers/dma/:262 location for offload engine drivers263include/linux/async_tx.h:264 core header file for the async_tx api265crypto/async_tx/async_tx.c:266 async_tx interface to dmaengine and common code267crypto/async_tx/async_memcpy.c:268 copy offload269crypto/async_tx/async_xor.c:270 xor and xor zero sum offload271