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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Arm CoreSight Trace Memory Controller8 9maintainers:10 - Mathieu Poirier <mathieu.poirier@linaro.org>11 - Mike Leach <mike.leach@linaro.org>12 - Leo Yan <leo.yan@linaro.org>13 - Suzuki K Poulose <suzuki.poulose@arm.com>14 15description: |16 CoreSight components are compliant with the ARM CoreSight architecture17 specification and can be connected in various topologies to suit a particular18 SoCs tracing needs. These trace components can generally be classified as19 sinks, links and sources. Trace data produced by one or more sources flows20 through the intermediate links connecting the source to the currently selected21 sink.22 23 Trace Memory Controller is used for Embedded Trace Buffer(ETB), Embedded Trace24 FIFO(ETF) and Embedded Trace Router(ETR) configurations. The configuration25 mode (ETB, ETF, ETR) is discovered at boot time when the device is probed.26 27# Need a custom select here or 'arm,primecell' will match on lots of nodes28select:29 properties:30 compatible:31 contains:32 const: arm,coresight-tmc33 required:34 - compatible35 36allOf:37 - $ref: /schemas/arm/primecell.yaml#38 39properties:40 compatible:41 items:42 - const: arm,coresight-tmc43 - const: arm,primecell44 45 reg:46 maxItems: 147 48 clocks:49 minItems: 150 maxItems: 251 52 clock-names:53 minItems: 154 items:55 - const: apb_pclk56 - const: atclk57 58 iommus:59 maxItems: 160 61 power-domains:62 maxItems: 163 64 arm,buffer-size:65 $ref: /schemas/types.yaml#/definitions/uint3266 deprecated: true67 description:68 Size of contiguous buffer space for TMC ETR (embedded trace router). The69 buffer size can be configured dynamically via buffer_size property in70 sysfs instead.71 72 arm,scatter-gather:73 type: boolean74 description:75 Indicates that the TMC-ETR can safely use the SG mode on this system.76 77 arm,max-burst-size:78 description:79 The maximum burst size initiated by TMC on the AXI master interface. The80 burst size can be in the range [0..15], the setting supports one data81 transfer per burst up to a maximum of 16 data transfers per burst.82 $ref: /schemas/types.yaml#/definitions/uint3283 maximum: 1584 85 in-ports:86 $ref: /schemas/graph.yaml#/properties/ports87 additionalProperties: false88 89 properties:90 port:91 description: Input connection from the CoreSight Trace bus.92 $ref: /schemas/graph.yaml#/properties/port93 94 out-ports:95 $ref: /schemas/graph.yaml#/properties/ports96 additionalProperties: false97 98 properties:99 port:100 description: AXI or ATB Master output connection. Used for ETR101 and ETF configurations.102 $ref: /schemas/graph.yaml#/properties/port103 104required:105 - compatible106 - reg107 - clocks108 - clock-names109 - in-ports110 111unevaluatedProperties: false112 113examples:114 - |115 etr@20070000 {116 compatible = "arm,coresight-tmc", "arm,primecell";117 reg = <0x20070000 0x1000>;118 119 clocks = <&oscclk6a>;120 clock-names = "apb_pclk";121 in-ports {122 port {123 etr_in_port: endpoint {124 remote-endpoint = <&replicator2_out_port0>;125 };126 };127 };128 129 out-ports {130 port {131 etr_out_port: endpoint {132 remote-endpoint = <&catu_in_port>;133 };134 };135 };136 };137...138