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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/arm/cci-control-port.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: CCI Interconnect Bus Masters8 9maintainers:10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>11 12description: |13 Masters in the device tree connected to a CCI port (inclusive of CPUs14 and their cpu nodes).15 16select: true17 18properties:19 cci-control-port:20 $ref: /schemas/types.yaml#/definitions/phandle21 22additionalProperties: true23 24examples:25 - |26 cpus {27 #address-cells = <1>;28 #size-cells = <0>;29 30 cpu@0 {31 compatible = "arm,cortex-a15";32 device_type = "cpu";33 cci-control-port = <&cci_control1>;34 reg = <0>;35 };36 };37 38...39