brintos

brintos / linux-shallow public Read only

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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Hisilicon CPU controller8 9maintainers:10  - Wei Xu <xuwei5@hisilicon.com>11 12description: |13  The clock registers and power registers of secondary cores are defined14  in CPU controller, especially in HIX5HD2 SoC.15 16properties:17  compatible:18    items:19      - const: hisilicon,cpuctrl20 21  reg:22    maxItems: 123 24  "#address-cells":25    const: 126 27  "#size-cells":28    const: 129 30  ranges: true31 32patternProperties:33  "^clock@[0-9a-f]+$":34    type: object35    additionalProperties: false36 37    properties:38      compatible:39        const: hisilicon,hix5hd2-clock40 41      reg:42        maxItems: 143 44      "#clock-cells":45        const: 146 47    required:48      - compatible49      - reg50      - "#clock-cells"51 52required:53  - compatible54  - reg55 56additionalProperties:57  type: object58 59examples:60  - |61    cpuctrl@a22000 {62        compatible = "hisilicon,cpuctrl";63        #address-cells = <1>;64        #size-cells = <1>;65        reg = <0x00a22000 0x2000>;66        ranges = <0 0x00a22000 0x2000>;67 68        clock: clock@0 {69            compatible = "hisilicon,hix5hd2-clock";70            reg = <0 0x2000>;71            #clock-cells = <1>;72        };73    };74...75