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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/ata/imx-sata.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Freescale i.MX AHCI SATA Controller8 9maintainers:10 - Shawn Guo <shawn.guo@linaro.org>11 12description: |13 The Freescale i.MX SATA controller mostly conforms to the AHCI interface14 with some special extensions at integration level.15 16properties:17 compatible:18 enum:19 - fsl,imx53-ahci20 - fsl,imx6q-ahci21 - fsl,imx6qp-ahci22 - fsl,imx8qm-ahci23 24 reg:25 maxItems: 126 27 interrupts:28 maxItems: 129 30 clocks:31 minItems: 232 items:33 - description: sata clock34 - description: sata reference clock35 - description: ahb clock36 37 clock-names:38 minItems: 239 items:40 - const: sata41 - const: sata_ref42 - const: ahb43 44 fsl,transmit-level-mV:45 $ref: /schemas/types.yaml#/definitions/uint3246 description: transmit voltage level, in millivolts.47 48 fsl,transmit-boost-mdB:49 $ref: /schemas/types.yaml#/definitions/uint3250 description: transmit boost level, in milli-decibels.51 52 fsl,transmit-atten-16ths:53 $ref: /schemas/types.yaml#/definitions/uint3254 description: transmit attenuation, in 16ths.55 56 fsl,receive-eq-mdB:57 $ref: /schemas/types.yaml#/definitions/uint3258 description: receive equalisation, in milli-decibels.59 60 fsl,no-spread-spectrum:61 $ref: /schemas/types.yaml#/definitions/flag62 description: if present, disable spread-spectrum clocking on the SATA link.63 64 phys:65 items:66 - description: phandle to SATA PHY.67 Since "REXT" pin is only present for first lane of i.MX8QM PHY, it's68 calibration result will be stored, passed through second lane, and69 shared with all three lanes PHY. The first two lanes PHY are used as70 calibration PHYs, although only the third lane PHY is used by SATA.71 - description: phandle to the first lane PHY of i.MX8QM.72 - description: phandle to the second lane PHY of i.MX8QM.73 74 phy-names:75 items:76 - const: sata-phy77 - const: cali-phy078 - const: cali-phy179 80 power-domains:81 maxItems: 182 83required:84 - compatible85 - reg86 - interrupts87 - clocks88 - clock-names89 90allOf:91 - if:92 properties:93 compatible:94 contains:95 enum:96 - fsl,imx53-ahci97 - fsl,imx6q-ahci98 - fsl,imx6qp-ahci99 then:100 properties:101 clock-names:102 minItems: 3103 104 - if:105 properties:106 compatible:107 contains:108 enum:109 - fsl,imx8qm-ahci110 then:111 properties:112 clock-names:113 minItems: 2114 115additionalProperties: false116 117examples:118 - |119 #include <dt-bindings/clock/imx6qdl-clock.h>120 #include <dt-bindings/interrupt-controller/arm-gic.h>121 122 sata@2200000 {123 compatible = "fsl,imx6q-ahci";124 reg = <0x02200000 0x4000>;125 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;126 clocks = <&clks IMX6QDL_CLK_SATA>,127 <&clks IMX6QDL_CLK_SATA_REF_100M>,128 <&clks IMX6QDL_CLK_AHB>;129 clock-names = "sata", "sata_ref", "ahb";130 };131