89 lines · yaml
1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A64 Display Engine Bus8 9maintainers:10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>12 13properties:14 $nodename:15 pattern: "^bus(@[0-9a-f]+)?$"16 17 "#address-cells":18 const: 119 20 "#size-cells":21 const: 122 23 compatible:24 oneOf:25 - const: allwinner,sun50i-a64-de226 - items:27 - const: allwinner,sun50i-h6-de328 - const: allwinner,sun50i-a64-de229 30 reg:31 maxItems: 132 33 allwinner,sram:34 description:35 The SRAM that needs to be claimed to access the display engine36 bus.37 $ref: /schemas/types.yaml#/definitions/phandle-array38 items:39 - items:40 - description: phandle to SRAM41 - description: register value for device42 43 ranges: true44 45patternProperties:46 # All other properties should be child nodes with unit-address and 'reg'47 "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$":48 type: object49 additionalProperties: true50 properties:51 reg:52 maxItems: 153 54 required:55 - reg56 57required:58 - compatible59 - reg60 - "#address-cells"61 - "#size-cells"62 - ranges63 - allwinner,sram64 65additionalProperties: false66 67examples:68 - |69 bus@1000000 {70 compatible = "allwinner,sun50i-a64-de2";71 reg = <0x1000000 0x400000>;72 allwinner,sram = <&de2_sram 1>;73 #address-cells = <1>;74 #size-cells = <1>;75 ranges = <0 0x1000000 0x400000>;76 77 display_clocks: clock@0 {78 compatible = "allwinner,sun50i-a64-de2-clk";79 reg = <0x0 0x100000>;80 clocks = <&ccu 52>, <&ccu 99>;81 clock-names = "bus", "mod";82 resets = <&ccu 30>;83 #clock-cells = <1>;84 #reset-cells = <1>;85 };86 };87 88...89