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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra ACONNECT Bus8 9description: |10 The Tegra ACONNECT bus is an AXI switch which is used to connect various11 components inside the Audio Processing Engine (APE). All CPU accesses to12 the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All13 devices accessed via the ACONNECT are described by child-nodes.14 15maintainers:16 - Jon Hunter <jonathanh@nvidia.com>17 18properties:19 compatible:20 oneOf:21 - const: nvidia,tegra210-aconnect22 - items:23 - enum:24 - nvidia,tegra234-aconnect25 - nvidia,tegra186-aconnect26 - nvidia,tegra194-aconnect27 - const: nvidia,tegra210-aconnect28 29 clocks:30 items:31 - description: Must contain the entry for APE clock32 - description: Must contain the entry for APE interface clock33 34 clock-names:35 items:36 - const: ape37 - const: apb2ape38 39 power-domains:40 maxItems: 141 42 "#address-cells":43 enum: [ 1, 2 ]44 45 "#size-cells":46 enum: [ 1, 2 ]47 48 ranges: true49 50patternProperties:51 "@[0-9a-f]+$":52 type: object53 54required:55 - compatible56 - clocks57 - clock-names58 - power-domains59 - "#address-cells"60 - "#size-cells"61 - ranges62 63additionalProperties: false64 65examples:66 - |67 #include<dt-bindings/clock/tegra210-car.h>68 69 aconnect@702c0000 {70 compatible = "nvidia,tegra210-aconnect";71 clocks = <&tegra_car TEGRA210_CLK_APE>,72 <&tegra_car TEGRA210_CLK_APB2APE>;73 clock-names = "ape", "apb2ape";74 power-domains = <&pd_audio>;75 76 #address-cells = <1>;77 #size-cells = <1>;78 ranges = <0x702c0000 0x702c0000 0x00040000>;79 80 // Child device nodes follow ...81 };82 83...84