88 lines · yaml
1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A10 Module 1 Clock8 9maintainers:10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>12 13deprecated: true14 15properties:16 "#clock-cells":17 const: 118 description: >19 There is three different outputs: the main clock, with the ID 0,20 and the output and sample clocks, with the IDs 1 and 2,21 respectively.22 23 compatible:24 enum:25 - allwinner,sun4i-a10-mmc-clk26 - allwinner,sun9i-a80-mmc-clk27 28 reg:29 maxItems: 130 31 clocks:32 minItems: 233 maxItems: 334 description: >35 The parent order must match the hardware programming order.36 37 clock-output-names:38 maxItems: 339 40required:41 - "#clock-cells"42 - compatible43 - reg44 - clocks45 - clock-output-names46 47additionalProperties: false48 49if:50 properties:51 compatible:52 contains:53 const: allwinner,sun4i-a10-mmc-clk54 55then:56 properties:57 clocks:58 maxItems: 359 60else:61 properties:62 clocks:63 maxItems: 264 65examples:66 - |67 clk@1c20088 {68 #clock-cells = <1>;69 compatible = "allwinner,sun4i-a10-mmc-clk";70 reg = <0x01c20088 0x4>;71 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;72 clock-output-names = "mmc0",73 "mmc0_output",74 "mmc0_sample";75 };76 77 - |78 clk@6000410 {79 #clock-cells = <1>;80 compatible = "allwinner,sun9i-a80-mmc-clk";81 reg = <0x06000410 0x4>;82 clocks = <&osc24M>, <&pll4>;83 clock-output-names = "mmc0", "mmc0_output",84 "mmc0_sample";85 };86 87...88