69 lines · yaml
1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A80 MMC Configuration Clock8 9maintainers:10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>12 13deprecated: true14 15description: >16 There is one clock/reset output per mmc controller. The number of17 outputs is determined by the size of the address block, which is18 related to the overall mmc block.19 20properties:21 "#clock-cells":22 const: 123 description: >24 The additional ID argument passed to the clock shall refer to25 the index of the output.26 27 "#reset-cells":28 const: 129 30 compatible:31 const: allwinner,sun9i-a80-mmc-config-clk32 33 reg:34 maxItems: 135 36 clocks:37 maxItems: 138 39 resets:40 maxItems: 141 42 clock-output-names:43 maxItems: 444 45required:46 - "#clock-cells"47 - "#reset-cells"48 - compatible49 - reg50 - clocks51 - clock-output-names52 53additionalProperties: false54 55examples:56 - |57 clk@1c13000 {58 #clock-cells = <1>;59 #reset-cells = <1>;60 compatible = "allwinner,sun9i-a80-mmc-config-clk";61 reg = <0x01c13000 0x10>;62 clocks = <&ahb0_gates 8>;63 resets = <&ahb0_resets 8>;64 clock-output-names = "mmc0_config", "mmc1_config",65 "mmc2_config", "mmc3_config";66 };67 68...69