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1* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit2 3The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and4supplies clock to various controllers within the SoC.5 6Required Properties:7 8- compatible: must be one of:9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs12- #clock-cells: should be 1.13- #reset-cells: should be 1.14- clocks: list of clock phandles, one for each entry in clock-names15- clock-names: should contain the following:16 * "xtal": the 24MHz system oscillator17 * "ddr_pll": the DDR PLL clock18 * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)19 20Parent node should have the following properties :21- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"22- reg: base address and size of the HHI system control register space.23 24Each clock is assigned an identifier and client nodes can use this identifier25to specify the clock which they consume. All available clocks are defined as26preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be27used in device tree sources.28 29Similarly a preprocessor macro for each reset line is defined in30dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the31device tree sources).32 33 34Example: Clock controller node:35 36 clkc: clock-controller {37 compatible = "amlogic,meson8b-clkc";38 #clock-cells = <1>;39 #reset-cells = <1>;40 };41 42 43Example: UART controller node that consumes the clock generated by the clock44 controller:45 46 uart_AO: serial@c81004c0 {47 compatible = "amlogic,meson-uart";48 reg = <0xc81004c0 0x14>;49 interrupts = <0 90 1>;50 clocks = <&clkc CLKID_CLK81>;51 };52