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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier8 9maintainers:10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>11 12description: |13 The CS2000-CP is an extremely versatile system clocking device that14 utilizes a programmable phase lock loop.15 16 Link: https://www.cirrus.com/products/cs2000/17 18properties:19 compatible:20 enum:21 - cirrus,cs2000-cp22 23 clocks:24 description:25 Common clock binding for CLK_IN, XTI/REF_CLK26 maxItems: 227 28 clock-names:29 items:30 - const: clk_in31 - const: ref_clk32 33 '#clock-cells':34 const: 035 36 reg:37 maxItems: 138 39 cirrus,aux-output-source:40 description:41 Specifies the function of the auxiliary clock output pin42 $ref: /schemas/types.yaml#/definitions/uint3243 enum:44 - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_clk input45 - 1 # CS2000CP_AUX_OUTPUT_CLK_IN: clk_in input46 - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT: clk_out output47 - 3 # CS2000CP_AUX_OUTPUT_PLL_LOCK: pll lock status48 default: 049 50 cirrus,clock-skip:51 description:52 This mode allows the PLL to maintain lock even when CLK_IN53 has missing pulses for up to 20 ms.54 $ref: /schemas/types.yaml#/definitions/flag55 56 cirrus,dynamic-mode:57 description:58 In dynamic mode, the CLK_IN input is used to drive the59 digital PLL of the silicon.60 If not given, the static mode shall be used to derive the61 output signal directly from the REF_CLK input.62 $ref: /schemas/types.yaml#/definitions/flag63 64required:65 - compatible66 - reg67 - clocks68 - clock-names69 - '#clock-cells'70 71additionalProperties: false72 73examples:74 - |75 #include <dt-bindings/clock/cirrus,cs2000-cp.h>76 77 i2c@0 {78 reg = <0x0 0x100>;79 #address-cells = <1>;80 #size-cells = <0>;81 82 clock-controller@4f {83 #clock-cells = <0>;84 compatible = "cirrus,cs2000-cp";85 reg = <0x4f>;86 clocks = <&rcar_sound 0>, <&x12_clk>;87 clock-names = "clk_in", "ref_clk";88 cirrus,aux-output-source = <CS2000CP_AUX_OUTPUT_CLK_OUT>;89 };90 };91