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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/imx31-clock.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Freescale i.MX31 Clock Controller8 9maintainers:10  - Fabio Estevam <festevam@gmail.com>11 12description: |13  The clock consumer should specify the desired clock by having the clock14  ID in its "clocks" phandle cell. The following is a full list of i.MX3115  clocks and IDs.16 17        Clock		    ID18        -----------------------19        dummy	             020        ckih                 121        ckil                 222        mpll                 323        spll                 424        upll                 525        mcu_main             626        hsp                  727        ahb                  828        nfc                  929        ipg                  1030        per_div              1131        per                  1232        csi_sel              1333        fir_sel              1434        csi_div              1535        usb_div_pre          1636        usb_div_post         1737        fir_div_pre          1838        fir_div_post         1939        sdhc1_gate           2040        sdhc2_gate           2141        gpt_gate             2242        epit1_gate           2343        epit2_gate           2444        iim_gate             2545        ata_gate             2646        sdma_gate            2747        cspi3_gate           2848        rng_gate             2949        uart1_gate           3050        uart2_gate           3151        ssi1_gate            3252        i2c1_gate            3353        i2c2_gate            3454        i2c3_gate            3555        hantro_gate          3656        mstick1_gate         3757        mstick2_gate         3858        csi_gate             3959        rtc_gate             4060        wdog_gate            4161        pwm_gate             4262        sim_gate             4363        ect_gate             4464        usb_gate             4565        kpp_gate             4666        ipu_gate             4767        uart3_gate           4868        uart4_gate           4969        uart5_gate           5070        owire_gate           5171        ssi2_gate            5272        cspi1_gate           5373        cspi2_gate           5474        gacc_gate            5575        emi_gate             5676        rtic_gate            5777        firi_gate            5878 79properties:80  compatible:81    const: fsl,imx31-ccm82 83  reg:84    maxItems: 185 86  interrupts:87    description: CCM provides 2 interrupt requests, request 1 is to generate88      interrupt for DVFS when a frequency change is requested, request 2 is89      to generate interrupt for DPTC when a voltage change is requested.90    items:91      - description: CCM DVFS interrupt request 192      - description: CCM DPTC interrupt request 293 94  '#clock-cells':95    const: 196 97required:98  - compatible99  - reg100  - interrupts101  - '#clock-cells'102 103additionalProperties: false104 105examples:106  - |107    clock-controller@53f80000 {108        compatible = "fsl,imx31-ccm";109        reg = <0x53f80000 0x4000>;110        interrupts = <31>, <53>;111        #clock-cells = <1>;112    };113