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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP i.MX8M Family Clock Control Module8 9maintainers:10 - Abel Vesa <abelvesa@kernel.org>11 - Peng Fan <peng.fan@nxp.com>12 13description: |14 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock15 controller, which generates and supplies to all modules.16 17properties:18 compatible:19 enum:20 - fsl,imx8mm-ccm21 - fsl,imx8mn-ccm22 - fsl,imx8mp-ccm23 - fsl,imx8mq-ccm24 25 reg:26 maxItems: 127 28 interrupts:29 maxItems: 230 31 clocks:32 minItems: 633 maxItems: 734 35 clock-names:36 minItems: 637 maxItems: 738 39 '#clock-cells':40 const: 141 description:42 The clock consumer should specify the desired clock by having the clock43 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h44 for the full list of i.MX8M clock IDs.45 46required:47 - compatible48 - reg49 - clocks50 - clock-names51 - '#clock-cells'52 53allOf:54 - if:55 properties:56 compatible:57 contains:58 const: fsl,imx8mq-ccm59 then:60 properties:61 clocks:62 items:63 - description: 32k osc64 - description: 25m osc65 - description: 27m osc66 - description: ext1 clock input67 - description: ext2 clock input68 - description: ext3 clock input69 - description: ext4 clock input70 clock-names:71 items:72 - const: ckil73 - const: osc_25m74 - const: osc_27m75 - const: clk_ext176 - const: clk_ext277 - const: clk_ext378 - const: clk_ext479 else:80 properties:81 clocks:82 items:83 - description: 32k osc84 - description: 24m osc85 - description: ext1 clock input86 - description: ext2 clock input87 - description: ext3 clock input88 - description: ext4 clock input89 90 clock-names:91 items:92 - const: osc_32k93 - const: osc_24m94 - const: clk_ext195 - const: clk_ext296 - const: clk_ext397 - const: clk_ext498 99additionalProperties: false100 101examples:102 # Clock Control Module node:103 - |104 clock-controller@30380000 {105 compatible = "fsl,imx8mm-ccm";106 reg = <0x30380000 0x10000>;107 #clock-cells = <1>;108 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,109 <&clk_ext3>, <&clk_ext4>;110 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",111 "clk_ext3", "clk_ext4";112 };113 114 - |115 clock-controller@30380000 {116 compatible = "fsl,imx8mq-ccm";117 reg = <0x30380000 0x10000>;118 #clock-cells = <1>;119 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,120 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;121 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",122 "clk_ext2", "clk_ext3", "clk_ext4";123 };124 125...126