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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock8 9maintainers:10 - Aisheng Dong <aisheng.dong@nxp.com>11 12description: |13 The Low-Power Clock Gate (LPCG) modules contain a local programming14 model to control the clock gates for the peripherals. An LPCG module15 is used to locally gate the clocks for the associated peripheral.16 17 This level of clock gating is provided after the clocks are generated18 by the SCU resources and clock controls. Thus even if the clock is19 enabled by these control bits, it might still not be running based20 on the base resource.21 22 The clock consumer should specify the desired clock by having the clock23 ID in its "clocks" phandle cell. See the full list of clock IDs from:24 include/dt-bindings/clock/imx8-lpcg.h25 26properties:27 compatible:28 oneOf:29 - const: fsl,imx8qxp-lpcg30 - items:31 - enum:32 - fsl,imx8qm-lpcg33 - const: fsl,imx8qxp-lpcg34 - enum:35 - fsl,imx8qxp-lpcg-adma36 - fsl,imx8qxp-lpcg-conn37 - fsl,imx8qxp-lpcg-dc38 - fsl,imx8qxp-lpcg-dsp39 - fsl,imx8qxp-lpcg-gpu40 - fsl,imx8qxp-lpcg-hsio41 - fsl,imx8qxp-lpcg-img42 - fsl,imx8qxp-lpcg-lsio43 - fsl,imx8qxp-lpcg-vpu44 deprecated: true45 reg:46 maxItems: 147 48 '#clock-cells':49 const: 150 51 clocks:52 description: |53 Input parent clocks phandle array for each clock54 minItems: 155 maxItems: 856 57 clock-indices:58 description: |59 An integer array indicating the bit offset for each clock.60 Refer to <include/dt-bindings/clock/imx8-lpcg.h> for the61 supported LPCG clock indices.62 minItems: 163 maxItems: 864 65 clock-output-names:66 description: |67 Shall be the corresponding names of the outputs.68 NOTE this property must be specified in the same order69 as the clock-indices property.70 minItems: 171 maxItems: 872 73 power-domains:74 maxItems: 175 76required:77 - compatible78 - reg79 - '#clock-cells'80 81additionalProperties: false82 83examples:84 - |85 #include <dt-bindings/clock/imx8-lpcg.h>86 #include <dt-bindings/firmware/imx/rsrc.h>87 #include <dt-bindings/interrupt-controller/arm-gic.h>88 89 sdhc0_lpcg: clock-controller@5b200000 {90 compatible = "fsl,imx8qxp-lpcg";91 reg = <0x5b200000 0x10000>;92 #clock-cells = <1>;93 clocks = <&sdhc0_clk IMX_SC_PM_CLK_PER>,94 <&conn_ipg_clk>,95 <&conn_axi_clk>;96 clock-indices = <IMX_LPCG_CLK_0>,97 <IMX_LPCG_CLK_4>,98 <IMX_LPCG_CLK_5>;99 clock-output-names = "sdhc0_lpcg_per_clk",100 "sdhc0_lpcg_ipg_clk",101 "sdhc0_lpcg_ahb_clk";102 power-domains = <&pd IMX_SC_R_SDHC_0>;103 };104