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1Device Tree Clock bindings for Marvell Berlin2 3This binding uses the common clock binding[1].4 5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt6 7Clock related registers are spread among the chip control registers. Berlin8clock node should be a sub-node of the chip controller node. Marvell Berlin29(BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some10minor differences in features and register layout.11 12Required properties:13- compatible: must be "marvell,berlin2-clk" or "marvell,berlin2q-clk"14- #clock-cells: must be 115- clocks: must be the input parent clock phandle16- clock-names: name of the input parent clock17 Allowed clock-names for the reference clocks are18 "refclk" for the SoCs oscillator input on all SoCs,19 and SoC-specific input clocks for20 BG2/BG2CD: "video_ext0" for the external video clock input21 22 23Example:24 25chip_clk: clock {26 compatible = "marvell,berlin2q-clk";27 28 #clock-cells = <1>;29 clocks = <&refclk>;30 clock-names = "refclk";31};32