52 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/mobileye,eyeq5-clk.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Mobileye EyeQ5 clock controller8 9description:10 The EyeQ5 clock controller handles 10 read-only PLLs derived from the main11 crystal clock. It also exposes one divider clock, a child of one of the PLLs.12 Its registers live in a shared region called OLB.13 14maintainers:15 - Grégory Clement <gregory.clement@bootlin.com>16 - Théo Lebrun <theo.lebrun@bootlin.com>17 - Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>18 19properties:20 compatible:21 const: mobileye,eyeq5-clk22 23 reg:24 maxItems: 225 26 reg-names:27 items:28 - const: plls29 - const: ospi30 31 "#clock-cells":32 const: 133 34 clocks:35 maxItems: 136 description:37 Input parent clock to all PLLs. Expected to be the main crystal.38 39 clock-names:40 items:41 - const: ref42 43required:44 - compatible45 - reg46 - reg-names47 - "#clock-cells"48 - clocks49 - clock-names50 51additionalProperties: false52