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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,dispcc-sc8280xp.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Display Clock & Reset Controller on SC8280XP8 9maintainers:10  - Bjorn Andersson <bjorn.andersson@linaro.org>11 12description: |13  Qualcomm display clock control module which supports the clocks, resets and14  power domains for the two MDSS instances on SC8280XP.15 16  See also:17    include/dt-bindings/clock/qcom,dispcc-sc8280xp.h18 19properties:20  compatible:21    enum:22      - qcom,sc8280xp-dispcc023      - qcom,sc8280xp-dispcc124 25  clocks:26    items:27      - description: AHB interface clock,28      - description: SoC CXO clock29      - description: SoC sleep clock30      - description: DisplayPort 0 link clock31      - description: DisplayPort 0 VCO div clock32      - description: DisplayPort 1 link clock33      - description: DisplayPort 1 VCO div clock34      - description: DisplayPort 2 link clock35      - description: DisplayPort 2 VCO div clock36      - description: DisplayPort 3 link clock37      - description: DisplayPort 3 VCO div clock38      - description: DSI 0 PLL byte clock39      - description: DSI 0 PLL DSI clock40      - description: DSI 1 PLL byte clock41      - description: DSI 1 PLL DSI clock42 43  power-domains:44    items:45      - description: MMCX power domain46 47required:48  - compatible49  - clocks50  - '#power-domain-cells'51 52allOf:53  - $ref: qcom,gcc.yaml#54 55unevaluatedProperties: false56 57examples:58  - |59    #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>60    #include <dt-bindings/clock/qcom,rpmh.h>61    #include <dt-bindings/power/qcom-rpmpd.h>62    clock-controller@af00000 {63      compatible = "qcom,sc8280xp-dispcc0";64      reg = <0x0af00000 0x20000>;65      clocks = <&gcc GCC_DISP_AHB_CLK>,66               <&rpmhcc RPMH_CXO_CLK>,67               <&sleep_clk>,68               <&mdss0_dp_phy0 0>,69               <&mdss0_dp_phy0 1>,70               <&mdss0_dp_phy1 0>,71               <&mdss0_dp_phy1 1>,72               <&mdss0_dp_phy2 0>,73               <&mdss0_dp_phy2 1>,74               <&mdss0_dp_phy3 0>,75               <&mdss0_dp_phy3 1>,76               <&mdss0_dsi0_phy 0>,77               <&mdss0_dsi0_phy 1>,78               <&mdss0_dsi1_phy 0>,79               <&mdss0_dsi1_phy 1>;80      power-domains = <&rpmhpd SC8280XP_MMCX>;81      #clock-cells = <1>;82      #reset-cells = <1>;83      #power-domain-cells = <1>;84    };85...86