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1# SPDX-License-Identifier: GPL-2.0-only2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Global Clock & Reset Controller on IPQ80748 9maintainers:10 - Stephen Boyd <sboyd@kernel.org>11 - Taniya Das <quic_tdas@quicinc.com>12 13description: |14 Qualcomm global clock control module provides the clocks, resets and power15 domains on IPQ8074.16 17 See also:: include/dt-bindings/clock/qcom,gcc-ipq8074.h18 19allOf:20 - $ref: qcom,gcc.yaml#21 22properties:23 compatible:24 const: qcom,gcc-ipq807425 26 clocks:27 items:28 - description: board XO clock29 - description: sleep clock30 - description: Gen3 QMP PCIe PHY PIPE clock31 - description: Gen2 QMP PCIe PHY PIPE clock32 33 clock-names:34 items:35 - const: xo36 - const: sleep_clk37 - const: pcie0_pipe38 - const: pcie1_pipe39 40required:41 - compatible42 - '#power-domain-cells'43 44unevaluatedProperties: false45 46examples:47 - |48 clock-controller@1800000 {49 compatible = "qcom,gcc-ipq8074";50 reg = <0x01800000 0x80000>;51 #clock-cells = <1>;52 #power-domain-cells = <1>;53 #reset-cells = <1>;54 };55...56