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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Global Clock & Reset Controller on IPQ53328 9maintainers:10 - Bjorn Andersson <andersson@kernel.org>11 12description: |13 Qualcomm global clock control module provides the clocks, resets and power14 domains on IPQ5332.15 16 See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h17 18allOf:19 - $ref: qcom,gcc.yaml#20 21properties:22 compatible:23 const: qcom,ipq5332-gcc24 25 clocks:26 items:27 - description: Board XO clock source28 - description: Sleep clock source29 - description: PCIE 2lane PHY pipe clock source30 - description: PCIE 2lane x1 PHY pipe clock source (For second lane)31 - description: USB PCIE wrapper pipe clock source32 33 '#power-domain-cells': false34 '#interconnect-cells':35 const: 136 37required:38 - compatible39 - clocks40 41unevaluatedProperties: false42 43examples:44 - |45 clock-controller@1800000 {46 compatible = "qcom,ipq5332-gcc";47 reg = <0x01800000 0x80000>;48 clocks = <&xo_board>,49 <&sleep_clk>,50 <&pcie_2lane_phy_pipe_clk>,51 <&pcie_2lane_phy_pipe_clk_x1>,52 <&usb_pcie_wrapper_pipe_clk>;53 #clock-cells = <1>;54 #reset-cells = <1>;55 };56...57