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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v18 9maintainers:10 - Christian Marangi <ansuelsmth@gmail.com>11 12description:13 The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.14 There is one ACC register region per CPU within the KPSS remapped region as15 well as an alias register region that remaps accesses to the ACC associated16 with the CPU accessing the region. ACC v1 is currently used as a17 clock-controller for enabling the cpu and handling the aux clocks.18 19properties:20 compatible:21 const: qcom,kpss-acc-v122 23 reg:24 items:25 - description: Base address and size of the register region26 - description: Optional base address and size of the alias register region27 minItems: 128 29 clocks:30 minItems: 231 maxItems: 232 33 clock-names:34 items:35 - const: pll8_vote36 - const: pxo37 38 clock-output-names:39 description: Name of the aux clock. Krait can have at most 4 cpu.40 enum:41 - acpu0_aux42 - acpu1_aux43 - acpu2_aux44 - acpu3_aux45 46 '#clock-cells':47 const: 048 49required:50 - compatible51 - reg52 - clocks53 - clock-names54 - clock-output-names55 - '#clock-cells'56 57additionalProperties: false58 59examples:60 - |61 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>62 63 clock-controller@2088000 {64 compatible = "qcom,kpss-acc-v1";65 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;66 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;67 clock-names = "pll8_vote", "pxo";68 clock-output-names = "acpu0_aux";69 #clock-cells = <0>;70 };71 72...73