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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Display Clock & Reset Controller on SC72808 9maintainers:10 - Taniya Das <quic_tdas@quicinc.com>11 12description: |13 Qualcomm display clock control module provides the clocks, resets and power14 domains on SC7280.15 16 See also:: include/dt-bindings/clock/qcom,dispcc-sc7280.h17 18properties:19 compatible:20 const: qcom,sc7280-dispcc21 22 clocks:23 items:24 - description: Board XO source25 - description: GPLL0 source from GCC26 - description: Byte clock from DSI PHY27 - description: Pixel clock from DSI PHY28 - description: Link clock from DP PHY29 - description: VCO DIV clock from DP PHY30 - description: Link clock from EDP PHY31 - description: VCO DIV clock from EDP PHY32 33 clock-names:34 items:35 - const: bi_tcxo36 - const: gcc_disp_gpll0_clk37 - const: dsi0_phy_pll_out_byteclk38 - const: dsi0_phy_pll_out_dsiclk39 - const: dp_phy_pll_link_clk40 - const: dp_phy_pll_vco_div_clk41 - const: edp_phy_pll_link_clk42 - const: edp_phy_pll_vco_div_clk43 44required:45 - compatible46 - clocks47 - clock-names48 - '#power-domain-cells'49 50allOf:51 - $ref: qcom,gcc.yaml#52 53unevaluatedProperties: false54 55examples:56 - |57 #include <dt-bindings/clock/qcom,gcc-sc7280.h>58 #include <dt-bindings/clock/qcom,rpmh.h>59 clock-controller@af00000 {60 compatible = "qcom,sc7280-dispcc";61 reg = <0x0af00000 0x200000>;62 clocks = <&rpmhcc RPMH_CXO_CLK>,63 <&gcc GCC_DISP_GPLL0_CLK_SRC>,64 <&dsi_phy 0>,65 <&dsi_phy 1>,66 <&dp_phy 0>,67 <&dp_phy 1>,68 <&edp_phy 0>,69 <&edp_phy 1>;70 clock-names = "bi_tcxo",71 "gcc_disp_gpll0_clk",72 "dsi0_phy_pll_out_byteclk",73 "dsi0_phy_pll_out_dsiclk",74 "dp_phy_pll_link_clk",75 "dp_phy_pll_vco_div_clk",76 "edp_phy_pll_link_clk",77 "edp_phy_pll_vco_div_clk";78 #clock-cells = <1>;79 #reset-cells = <1>;80 #power-domain-cells = <1>;81 };82...83