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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm LPASS Core Clock Controller on SC72808 9maintainers:10 - Taniya Das <quic_tdas@quicinc.com>11 12description: |13 Qualcomm LPASS core clock control module provides the clocks and power14 domains on SC7280.15 16 See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h17 18properties:19 compatible:20 enum:21 - qcom,sc7280-lpasscc22 23 clocks:24 items:25 - description: gcc_cfg_noc_lpass_clk from GCC26 27 clock-names:28 items:29 - const: iface30 31 '#clock-cells':32 const: 133 34 reg:35 items:36 - description: LPASS qdsp6ss register37 - description: LPASS top-cc register38 39 reg-names:40 items:41 - const: qdsp6ss42 - const: top_cc43 44 qcom,adsp-pil-mode:45 description:46 Indicates if the LPASS would be brought out of reset using47 remoteproc peripheral loader.48 type: boolean49 50required:51 - compatible52 - reg53 - clocks54 - clock-names55 - '#clock-cells'56 57additionalProperties: false58 59examples:60 - |61 #include <dt-bindings/clock/qcom,gcc-sc7280.h>62 #include <dt-bindings/clock/qcom,lpass-sc7280.h>63 clock-controller@3000000 {64 compatible = "qcom,sc7280-lpasscc";65 reg = <0x03000000 0x40>, <0x03c04000 0x4>;66 reg-names = "qdsp6ss", "top_cc";67 clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;68 clock-names = "iface";69 qcom,adsp-pil-mode;70 #clock-cells = <1>;71 };72...73