193 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm LPASS Core & Audio Clock Controller on SC72808 9maintainers:10 - Taniya Das <quic_tdas@quicinc.com>11 12description: |13 Qualcomm LPASS core and audio clock control module provides the clocks and14 power domains on SC7280.15 16 See also::17 include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h18 include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h19 20properties:21 clocks: true22 23 clock-names: true24 25 reg: true26 27 compatible:28 enum:29 - qcom,sc7280-lpassaoncc30 - qcom,sc7280-lpassaudiocc31 - qcom,sc7280-lpasscorecc32 - qcom,sc7280-lpasshm33 34 power-domains:35 maxItems: 136 37 '#clock-cells':38 const: 139 40 '#power-domain-cells':41 const: 142 43 '#reset-cells':44 const: 145 46 qcom,adsp-pil-mode:47 description:48 Indicates if the LPASS would be brought out of reset using49 peripheral loader.50 type: boolean51 52required:53 - compatible54 - reg55 - clocks56 - clock-names57 - '#clock-cells'58 - '#power-domain-cells'59 60additionalProperties: false61 62allOf:63 - if:64 properties:65 compatible:66 contains:67 const: qcom,sc7280-lpassaudiocc68 69 then:70 properties:71 clocks:72 items:73 - description: Board XO source74 - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC75 76 clock-names:77 items:78 - const: bi_tcxo79 - const: lpass_aon_cc_main_rcg_clk_src80 81 reg:82 items:83 - description: lpass core cc register84 - description: lpass audio csr register85 - if:86 properties:87 compatible:88 contains:89 enum:90 - qcom,sc7280-lpassaoncc91 92 then:93 properties:94 clocks:95 items:96 - description: Board XO source97 - description: Board XO active only source98 - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC99 100 clock-names:101 items:102 - const: bi_tcxo103 - const: bi_tcxo_ao104 - const: iface105 106 reg:107 maxItems: 1108 - if:109 properties:110 compatible:111 contains:112 enum:113 - qcom,sc7280-lpasshm114 - qcom,sc7280-lpasscorecc115 116 then:117 properties:118 clocks:119 items:120 - description: Board XO source121 122 clock-names:123 items:124 - const: bi_tcxo125 126 reg:127 maxItems: 1128examples:129 - |130 #include <dt-bindings/clock/qcom,rpmh.h>131 #include <dt-bindings/clock/qcom,gcc-sc7280.h>132 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>133 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>134 lpass_audiocc: clock-controller@3300000 {135 compatible = "qcom,sc7280-lpassaudiocc";136 reg = <0x3300000 0x30000>,137 <0x32a9000 0x1000>;138 clocks = <&rpmhcc RPMH_CXO_CLK>,139 <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;140 clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";141 power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;142 #clock-cells = <1>;143 #power-domain-cells = <1>;144 #reset-cells = <1>;145 };146 147 - |148 #include <dt-bindings/clock/qcom,rpmh.h>149 #include <dt-bindings/clock/qcom,gcc-sc7280.h>150 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>151 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>152 lpass_hm: clock-controller@3c00000 {153 compatible = "qcom,sc7280-lpasshm";154 reg = <0x3c00000 0x28>;155 clocks = <&rpmhcc RPMH_CXO_CLK>;156 clock-names = "bi_tcxo";157 #clock-cells = <1>;158 #power-domain-cells = <1>;159 };160 161 - |162 #include <dt-bindings/clock/qcom,rpmh.h>163 #include <dt-bindings/clock/qcom,gcc-sc7280.h>164 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>165 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>166 lpasscore: clock-controller@3900000 {167 compatible = "qcom,sc7280-lpasscorecc";168 reg = <0x3900000 0x50000>;169 clocks = <&rpmhcc RPMH_CXO_CLK>;170 clock-names = "bi_tcxo";171 power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;172 #clock-cells = <1>;173 #power-domain-cells = <1>;174 };175 176 - |177 #include <dt-bindings/clock/qcom,rpmh.h>178 #include <dt-bindings/clock/qcom,gcc-sc7280.h>179 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>180 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>181 lpass_aon: clock-controller@3380000 {182 compatible = "qcom,sc7280-lpassaoncc";183 reg = <0x3380000 0x30000>;184 clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,185 <&lpasscore LPASS_CORE_CC_CORE_CLK>;186 clock-names = "bi_tcxo", "bi_tcxo_ao","iface";187 qcom,adsp-pil-mode;188 #clock-cells = <1>;189 #power-domain-cells = <1>;190 };191 192...193