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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,sm8150-camcc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Camera Clock & Reset Controller on SM81508 9maintainers:10 - Satya Priya Kakitapalli <quic_skakitap@quicinc.com>11 12description: |13 Qualcomm camera clock control module provides the clocks, resets and14 power domains on SM8150.15 16 See also:: include/dt-bindings/clock/qcom,sm8150-camcc.h17 18properties:19 compatible:20 const: qcom,sm8150-camcc21 22 reg:23 maxItems: 124 25 clocks:26 items:27 - description: Board XO source28 - description: Camera AHB clock from GCC29 30 power-domains:31 maxItems: 132 description:33 A phandle and PM domain specifier for the MMCX power domain.34 35 required-opps:36 maxItems: 137 description:38 A phandle to an OPP node describing required MMCX performance point.39 40 '#clock-cells':41 const: 142 43 '#reset-cells':44 const: 145 46 '#power-domain-cells':47 const: 148 49required:50 - compatible51 - reg52 - clocks53 - power-domains54 - required-opps55 - '#clock-cells'56 - '#reset-cells'57 - '#power-domain-cells'58 59additionalProperties: false60 61examples:62 - |63 #include <dt-bindings/clock/qcom,gcc-sm8150.h>64 #include <dt-bindings/clock/qcom,rpmh.h>65 #include <dt-bindings/power/qcom-rpmpd.h>66 clock-controller@ad00000 {67 compatible = "qcom,sm8150-camcc";68 reg = <0x0ad00000 0x10000>;69 clocks = <&rpmhcc RPMH_CXO_CLK>,70 <&gcc GCC_CAMERA_AHB_CLK>;71 power-domains = <&rpmhpd SM8150_MMCX>;72 required-opps = <&rpmhpd_opp_low_svs>;73 #clock-cells = <1>;74 #reset-cells = <1>;75 #power-domain-cells = <1>;76 };77...78