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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Camera Clock & Reset Controller on SM84508 9maintainers:10 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>11 - Jagadeesh Kona <quic_jkona@quicinc.com>12 13description: |14 Qualcomm camera clock control module provides the clocks, resets and power15 domains on SM8450.16 17 See also:18 include/dt-bindings/clock/qcom,sc8280xp-camcc.h19 include/dt-bindings/clock/qcom,sm8450-camcc.h20 include/dt-bindings/clock/qcom,sm8550-camcc.h21 include/dt-bindings/clock/qcom,sm8650-camcc.h22 include/dt-bindings/clock/qcom,x1e80100-camcc.h23 24properties:25 compatible:26 enum:27 - qcom,sc8280xp-camcc28 - qcom,sm8450-camcc29 - qcom,sm8550-camcc30 - qcom,sm8650-camcc31 - qcom,x1e80100-camcc32 33 clocks:34 items:35 - description: Camera AHB clock from GCC36 - description: Board XO source37 - description: Board active XO source38 - description: Sleep clock source39 40 power-domains:41 maxItems: 142 description:43 A phandle and PM domain specifier for the MMCX power domain.44 45 required-opps:46 maxItems: 147 description:48 A phandle to an OPP node describing required MMCX performance point.49 50 reg:51 maxItems: 152 53required:54 - compatible55 - clocks56 - power-domains57 58allOf:59 - $ref: qcom,gcc.yaml#60 - if:61 properties:62 compatible:63 contains:64 enum:65 - qcom,sc8280xp-camcc66 - qcom,sm8450-camcc67 - qcom,sm8550-camcc68 - qcom,x1e80100-camcc69 then:70 required:71 - required-opps72 73unevaluatedProperties: false74 75examples:76 - |77 #include <dt-bindings/clock/qcom,gcc-sm8450.h>78 #include <dt-bindings/clock/qcom,rpmh.h>79 #include <dt-bindings/power/qcom,rpmhpd.h>80 clock-controller@ade0000 {81 compatible = "qcom,sm8450-camcc";82 reg = <0xade0000 0x20000>;83 clocks = <&gcc GCC_CAMERA_AHB_CLK>,84 <&rpmhcc RPMH_CXO_CLK>,85 <&rpmhcc RPMH_CXO_CLK_A>,86 <&sleep_clk>;87 power-domains = <&rpmhpd RPMHPD_MMCX>;88 required-opps = <&rpmhpd_opp_low_svs>;89 #clock-cells = <1>;90 #reset-cells = <1>;91 #power-domain-cells = <1>;92 };93...94