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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm SPMI PMIC clock divider8 9maintainers:10 - Bjorn Andersson <andersson@kernel.org>11 - Stephen Boyd <sboyd@kernel.org>12 13description: |14 Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of15 outputs on the PMIC. These clocks are typically wired through alternate16 functions on GPIO pins.17 18properties:19 compatible:20 const: qcom,spmi-clkdiv21 22 reg:23 maxItems: 124 25 clocks:26 items:27 - description: Board XO source28 29 clock-names:30 items:31 - const: xo32 33 "#clock-cells":34 const: 135 36 qcom,num-clkdivs:37 $ref: /schemas/types.yaml#/definitions/uint3238 description: Number of CLKDIV peripherals.39 40required:41 - compatible42 - reg43 - clocks44 - clock-names45 - "#clock-cells"46 - qcom,num-clkdivs47 48additionalProperties: false49 50examples:51 - |52 pmic {53 #address-cells = <1>;54 #size-cells = <0>;55 56 clock-controller@5b00 {57 compatible = "qcom,spmi-clkdiv";58 reg = <0x5b00>;59 clocks = <&xo_board>;60 clock-names = "xo";61 #clock-cells = <1>;62 qcom,num-clkdivs = <3>;63 64 assigned-clocks = <&pm8998_clk_divs 1>,65 <&pm8998_clk_divs 2>,66 <&pm8998_clk_divs 3>;67 assigned-clock-rates = <9600000>,68 <9600000>,69 <9600000>;70 };71 };72