brintos

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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU)8 9maintainers:10  - Elaine Zhang <zhangqing@rock-chips.com>11  - Heiko Stuebner <heiko@sntech.de>12 13description: |14  The RK3188/RK3066 clock controller generates and supplies clocks to various15  controllers within the SoC and also implements a reset controller for SoC16  peripherals.17  Each clock is assigned an identifier and client nodes can use this identifier18  to specify the clock which they consume. All available clocks are defined as19  preprocessor macros in the dt-bindings/clock/rk3188-cru.h and20  dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.21  Similar macros exist for the reset sources in these files.22  There are several clocks that are generated outside the SoC. It is expected23  that they are defined using standard clock bindings with following24  clock-output-names:25    - "xin24m"    - crystal input                 - required26    - "xin32k"    - RTC clock                     - optional27    - "xin27m"    - 27mhz crystal input on RK3066 - optional28    - "ext_hsadc" - external HSADC clock          - optional29    - "ext_cif0"  - external camera clock         - optional30    - "ext_rmii"  - external RMII clock           - optional31    - "ext_jtag"  - external JTAG clock           - optional32 33properties:34  compatible:35    enum:36      - rockchip,rk3066a-cru37      - rockchip,rk3188-cru38      - rockchip,rk3188a-cru39 40  reg:41    maxItems: 142 43  "#clock-cells":44    const: 145 46  "#reset-cells":47    const: 148 49  clocks:50    maxItems: 151 52  clock-names:53    const: xin24m54 55  rockchip,grf:56    $ref: /schemas/types.yaml#/definitions/phandle57    description:58      Phandle to the syscon managing the "general register files" (GRF),59      if missing pll rates are not changeable, due to the missing pll60      lock status.61 62required:63  - compatible64  - reg65  - "#clock-cells"66  - "#reset-cells"67 68additionalProperties: false69 70examples:71  - |72    cru: clock-controller@20000000 {73      compatible = "rockchip,rk3188-cru";74      reg = <0x20000000 0x1000>;75      rockchip,grf = <&grf>;76      #clock-cells = <1>;77      #reset-cells = <1>;78    };79