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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/samsung,exynos7-clock.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung Exynos7 SoC clock controller8 9maintainers:10 - Chanwoo Choi <cw00.choi@samsung.com>11 - Krzysztof Kozlowski <krzk@kernel.org>12 - Sylwester Nawrocki <s.nawrocki@samsung.com>13 - Tomasz Figa <tomasz.figa@gmail.com>14 15description: |16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching17 name::18 - "fin_pll" - PLL input clock from XXTI19 20 All available clocks are defined as preprocessor macros in21 include/dt-bindings/clock/exynos7-clk.h header.22 23properties:24 compatible:25 enum:26 - samsung,exynos7-clock-topc27 - samsung,exynos7-clock-top028 - samsung,exynos7-clock-top129 - samsung,exynos7-clock-ccore30 - samsung,exynos7-clock-peric031 - samsung,exynos7-clock-peric132 - samsung,exynos7-clock-peris33 - samsung,exynos7-clock-fsys034 - samsung,exynos7-clock-fsys135 - samsung,exynos7-clock-mscl36 - samsung,exynos7-clock-aud37 38 clocks:39 minItems: 140 maxItems: 1341 42 clock-names:43 minItems: 144 maxItems: 1345 46 "#clock-cells":47 const: 148 49 reg:50 maxItems: 151 52required:53 - compatible54 - "#clock-cells"55 - reg56 57allOf:58 - if:59 properties:60 compatible:61 contains:62 const: samsung,exynos7-clock-top063 then:64 properties:65 clocks:66 minItems: 667 maxItems: 668 clock-names:69 items:70 - const: fin_pll71 - const: dout_sclk_bus0_pll72 - const: dout_sclk_bus1_pll73 - const: dout_sclk_cc_pll74 - const: dout_sclk_mfc_pll75 - const: dout_sclk_aud_pll76 required:77 - clock-names78 - clocks79 80 - if:81 properties:82 compatible:83 contains:84 const: samsung,exynos7-clock-top185 then:86 properties:87 clocks:88 minItems: 589 maxItems: 590 clock-names:91 items:92 - const: fin_pll93 - const: dout_sclk_bus0_pll94 - const: dout_sclk_bus1_pll95 - const: dout_sclk_cc_pll96 - const: dout_sclk_mfc_pll97 required:98 - clock-names99 - clocks100 101 - if:102 properties:103 compatible:104 contains:105 const: samsung,exynos7-clock-ccore106 then:107 properties:108 clocks:109 minItems: 2110 maxItems: 2111 clock-names:112 items:113 - const: fin_pll114 - const: dout_aclk_ccore_133115 required:116 - clock-names117 - clocks118 119 - if:120 properties:121 compatible:122 contains:123 const: samsung,exynos7-clock-peric0124 then:125 properties:126 clocks:127 minItems: 3128 maxItems: 3129 clock-names:130 items:131 - const: fin_pll132 - const: dout_aclk_peric0_66133 - const: sclk_uart0134 required:135 - clock-names136 - clocks137 138 - if:139 properties:140 compatible:141 contains:142 const: samsung,exynos7-clock-peric1143 then:144 properties:145 clocks:146 minItems: 13147 maxItems: 13148 clock-names:149 items:150 - const: fin_pll151 - const: dout_aclk_peric1_66152 - const: sclk_uart1153 - const: sclk_uart2154 - const: sclk_uart3155 - const: sclk_spi0156 - const: sclk_spi1157 - const: sclk_spi2158 - const: sclk_spi3159 - const: sclk_spi4160 - const: sclk_i2s1161 - const: sclk_pcm1162 - const: sclk_spdif163 required:164 - clock-names165 - clocks166 167 - if:168 properties:169 compatible:170 contains:171 const: samsung,exynos7-clock-peris172 then:173 properties:174 clocks:175 minItems: 2176 maxItems: 2177 clock-names:178 items:179 - const: fin_pll180 - const: dout_aclk_peris_66181 required:182 - clock-names183 - clocks184 185 - if:186 properties:187 compatible:188 contains:189 const: samsung,exynos7-clock-fsys0190 then:191 properties:192 clocks:193 minItems: 3194 maxItems: 3195 clock-names:196 items:197 - const: fin_pll198 - const: dout_aclk_fsys0_200199 - const: dout_sclk_mmc2200 required:201 - clock-names202 - clocks203 204 - if:205 properties:206 compatible:207 contains:208 const: samsung,exynos7-clock-fsys1209 then:210 properties:211 clocks:212 minItems: 7213 maxItems: 7214 clock-names:215 items:216 - const: fin_pll217 - const: dout_aclk_fsys1_200218 - const: dout_sclk_mmc0219 - const: dout_sclk_mmc1220 - const: dout_sclk_ufsunipro20221 - const: dout_sclk_phy_fsys1222 - const: dout_sclk_phy_fsys1_26m223 required:224 - clock-names225 - clocks226 227 - if:228 properties:229 compatible:230 contains:231 const: samsung,exynos7-clock-aud232 then:233 properties:234 clocks:235 minItems: 2236 maxItems: 2237 clock-names:238 items:239 - const: fin_pll240 - const: fout_aud_pll241 required:242 - clock-names243 - clocks244 245additionalProperties: false246 247examples:248 - |249 #include <dt-bindings/clock/exynos7-clk.h>250 251 fin_pll: clock {252 compatible = "fixed-clock";253 clock-output-names = "fin_pll";254 #clock-cells = <0>;255 clock-frequency = <24000000>;256 };257 258 clock-controller@105e0000 {259 compatible = "samsung,exynos7-clock-top1";260 reg = <0x105e0000 0xb000>;261 #clock-cells = <1>;262 clocks = <&fin_pll>,263 <&clock_topc DOUT_SCLK_BUS0_PLL>,264 <&clock_topc DOUT_SCLK_BUS1_PLL>,265 <&clock_topc DOUT_SCLK_CC_PLL>,266 <&clock_topc DOUT_SCLK_MFC_PLL>;267 clock-names = "fin_pll",268 "dout_sclk_bus0_pll",269 "dout_sclk_bus1_pll",270 "dout_sclk_cc_pll",271 "dout_sclk_mfc_pll";272 };273