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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/samsung,s5pv210-audss-clock.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung S5Pv210 SoC Audio SubSystem clock controller8 9maintainers:10 - Chanwoo Choi <cw00.choi@samsung.com>11 - Krzysztof Kozlowski <krzk@kernel.org>12 - Sylwester Nawrocki <s.nawrocki@samsung.com>13 - Tomasz Figa <tomasz.figa@gmail.com>14 15description: |16 All available clocks are defined as preprocessor macros in17 include/dt-bindings/clock/s5pv210-audss.h header.18 19properties:20 compatible:21 const: samsung,s5pv210-audss-clock22 23 clocks:24 minItems: 425 items:26 - description:27 AHB bus clock of the Audio Subsystem.28 - description:29 Optional fixed rate PLL reference clock, parent of mout_audss. If not30 specified (i.e. xusbxti is used for PLL reference), it is fixed to a31 clock named "xxti".32 - description:33 Input PLL to the AudioSS block, parent of mout_audss.34 - description:35 Audio bus clock, parent of mout_i2s.36 - description:37 Optional external i2s clock, parent of mout_i2s. If not specified, it38 is fixed to a clock named "iiscdclk0".39 40 clock-names:41 minItems: 442 items:43 - const: hclk44 - const: xxti45 - const: fout_epll46 - const: sclk_audio047 - const: iiscdclk048 49 "#clock-cells":50 const: 151 52 power-domains:53 maxItems: 154 55 reg:56 maxItems: 157 58required:59 - compatible60 - clocks61 - clock-names62 - "#clock-cells"63 - reg64 65additionalProperties: false66 67examples:68 - |69 #include <dt-bindings/clock/s5pv210.h>70 71 clock-controller@c0900000 {72 compatible = "samsung,s5pv210-audss-clock";73 reg = <0xc0900000 0x1000>;74 #clock-cells = <1>;75 clock-names = "hclk", "xxti", "fout_epll", "sclk_audio0";76 clocks = <&clocks DOUT_HCLKP>, <&xxti>, <&clocks FOUT_EPLL>,77 <&clocks SCLK_AUDIO0>;78 };79